1/* 2 * Copyright (c) 2020-2024, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6/dts-v1/; 7 8#define AFF 00 9 10#include "fvp-defs.dtsi" 11#undef POST 12#define POST \ 13 }; 14 15/ { 16 compatible = "arm,ffa-core-manifest-1.0"; 17 #address-cells = <2>; 18 #size-cells = <2>; 19 20 attribute { 21 spmc_id = <0x8000>; 22 maj_ver = <0x1>; 23 min_ver = <0x2>; 24 exec_state = <0x0>; 25 load_address = <0x0 0x6000000>; 26 entrypoint = <0x0 0x6000000>; 27 binary_size = <0x80000>; 28 }; 29 30 hypervisor { 31 compatible = "hafnium,hafnium"; 32 vm1 { 33 is_ffa_partition; 34 debug_name = "cactus-primary"; 35 load_address = <0x7000000>; 36 vcpu_count = <8>; 37 mem_size = <0x100000>; 38 /* 39 * Platform specific SiP SMC call handled at EL3. Used 40 * to pend an interrupt for testing purpose. 41 */ 42 smc_whitelist = <0x82000100>; 43 }; 44 vm2 { 45 is_ffa_partition; 46 debug_name = "cactus-secondary"; 47 load_address = <0x7100000>; 48 vcpu_count = <8>; 49 mem_size = <0x100000>; 50 }; 51 vm3 { 52 is_ffa_partition; 53 debug_name = "cactus-tertiary"; 54 load_address = <0x7200000>; 55 vcpu_count = <1>; 56 mem_size = <0x300000>; 57 }; 58 vm4 { 59 is_ffa_partition; 60 debug_name = "ivy"; 61 load_address = <0x7600000>; 62 vcpu_count = <1>; 63 mem_size = <0x100000>; 64 }; 65 }; 66 67 cpus { 68 #address-cells = <0x2>; 69 #size-cells = <0x0>; 70 71 CPU_0 72 73 /* 74 * SPMC (Hafnium) requires secondary core nodes are declared 75 * in descending order. 76 */ 77 CPU_7 78 CPU_6 79 CPU_5 80 CPU_4 81 CPU_3 82 CPU_2 83 CPU_1 84 }; 85 86 memory@0 { 87 device_type = "memory"; 88 reg = <0x0 0xfd000000 0x0 0x2000000>, 89 <0x0 0x7000000 0x0 0x1000000>, 90 <0x0 0xff000000 0x0 0x1000000>; 91 }; 92 93 memory@1 { 94 device_type = "ns-memory"; 95 reg = <0x0 0x80000000 0x0 0x7c000000>, 96 <0x8 0x80000000 0x1 0x80000000>, 97 <0x00008800 0x80000000 0x0 0x7f000000>; 98 }; 99 100 memory@2 { 101 device_type = "device-memory"; 102 reg = <0x0 0x1c0b0000 0x0 0x20000>, /* UART 2-3 */ 103 <0x0 0x2bfe0000 0x0 0x20000>, /* SMMUv3TestEngine */ 104 <0x0 0x2a490000 0x0 0x20000>, /* SP805 Trusted Watchdog */ 105 <0x0 0x1c130000 0x0 0x10000>; /* Virtio block device */ 106 }; 107 108 memory@3 { 109 device_type = "ns-device-memory"; 110 reg = <0x0 0x1c090000 0x0 0x20000>; /* UART 0-1 */ 111 }; 112 113 114#if MEASURED_BOOT 115#include "event_log.dtsi" 116#endif 117}; 118