xref: /rk3399_ARM-atf/plat/arm/board/fvp/fdts/fvp_spmc_manifest.dts (revision 0a0a7a9ac82cb79af91f098cedc69cc67bca3978)
1/*
2 * Copyright (c) 2020, Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: BSD-3-Clause
5 */
6/dts-v1/;
7
8/ {
9	compatible = "arm,spci-core-manifest-1.0";
10
11	attribute {
12		spmc_id = <0x8000>;
13		maj_ver = <0x0>;
14		min_ver = <0x9>;
15		exec_state = <0x0>;
16		load_address = <0x0 0x6000000>;
17		entrypoint = <0x0 0x6000000>;
18	};
19
20	chosen {
21		linux,initrd-start = <0>;
22		linux,initrd-end = <0>;
23	};
24
25	hypervisor {
26		compatible = "hafnium,hafnium";
27		vm1 {
28			is_spci_partition;
29			debug_name = "cactus-primary";
30			load-addr = <0x7000000>;
31		};
32		vm2 {
33			is_spci_partition;
34			debug_name = "cactus-secondary";
35			load-addr = <0x7100000>;
36			vcpu_count = <2>;
37			mem_size = <1048576>;
38		};
39	};
40
41	cpus {
42		#address-cells = <0x2>;
43		#size-cells = <0x0>;
44
45		cpu-map {
46			cluster0 {
47				core0 {
48					cpu = <0x2>;
49				};
50			};
51		};
52
53		cpu@0 {
54			device_type = "cpu";
55			compatible = "arm,armv8";
56			reg = <0x0 0x0>;
57			enable-method = "psci";
58			next-level-cache = <0xc>;
59			phandle = <0x2>;
60		};
61	};
62
63	memory@60000000 {
64		device_type = "memory";
65		reg = <0x6000000 0x2000000>; /* Trusted DRAM */
66	};
67};
68