xref: /rk3399_ARM-atf/plat/arm/board/corstone1000/platform.mk (revision 06f3c7058c42a9f1a9f7df75ea2de71a000855e8) 
1#
2# Copyright (c) 2021-2025 Arm Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Making sure the corstone1000 platform type is specified
8ifeq ($(filter ${TARGET_PLATFORM}, fpga fvp),)
9        $(error TARGET_PLATFORM must be fpga or fvp)
10endif
11
12CORSTONE1000_CPU_LIBS	+=lib/cpus/aarch64/cortex_a35.S
13
14PLAT_INCLUDES		:=	-Iplat/arm/board/corstone1000/common/include	\
15				-Iplat/arm/board/corstone1000/include		\
16				-Iinclude/plat/arm/common			\
17				-Iinclude/plat/arm/css/common/aarch64
18
19
20CORSTONE1000_FW_NVCTR_VAL	:=	255
21TFW_NVCTR_VAL		:=	${CORSTONE1000_FW_NVCTR_VAL}
22NTFW_NVCTR_VAL		:=	${CORSTONE1000_FW_NVCTR_VAL}
23
24override NEED_BL1	:=	no
25
26override NEED_BL2	:=	yes
27FIP_BL2_ARGS := tb-fw
28
29override NEED_BL2U	:=	no
30override NEED_BL31	:=	yes
31NEED_BL32		?=	yes
32override NEED_BL33	:=	yes
33
34# Add CORSTONE1000_WITH_BL32 as a preprocessor define (-D option)
35ifeq (${NEED_BL32},yes)
36$(eval $(call add_define,CORSTONE1000_WITH_BL32))
37endif
38
39ENABLE_MULTICORE       :=      0
40ifneq ($(filter ${TARGET_PLATFORM}, fvp),)
41ifeq (${ENABLE_MULTICORE},1)
42$(eval $(call add_define,CORSTONE1000_FVP_MULTICORE))
43endif
44endif
45
46USE_GIC_DRIVER			:=	2
47
48BL2_SOURCES		+=	plat/arm/board/corstone1000/common/corstone1000_security.c		\
49				plat/arm/board/corstone1000/common/corstone1000_err.c		\
50				plat/arm/board/corstone1000/common/corstone1000_trusted_boot.c	\
51				lib/utils/mem_region.c					\
52				lib/cpus/aarch64/cpu_helpers.S \
53				plat/arm/board/corstone1000/common/corstone1000_helpers.S		\
54				plat/arm/board/corstone1000/common/corstone1000_plat.c		\
55				plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c \
56				${CORSTONE1000_CPU_LIBS}					\
57
58
59BL31_SOURCES	+=	drivers/cfi/v2m/v2m_flash.c				\
60			lib/utils/mem_region.c					\
61			plat/arm/board/corstone1000/common/corstone1000_helpers.S		\
62			plat/arm/board/corstone1000/common/corstone1000_topology.c		\
63			plat/arm/board/corstone1000/common/corstone1000_security.c		\
64			plat/arm/board/corstone1000/common/corstone1000_plat.c		\
65			plat/arm/board/corstone1000/common/corstone1000_pm.c		\
66			plat/arm/board/corstone1000/common/corstone1000_bl31_setup.c	\
67			${CORSTONE1000_CPU_LIBS}
68
69ifneq (${ENABLE_STACK_PROTECTOR},0)
70	ifneq (${ENABLE_STACK_PROTECTOR},none)
71		CORSTONE1000_SECURITY_SOURCES := plat/arm/board/corstone1000/common/corstone1000_stack_protector.c
72		BL2_SOURCES += ${CORSTONE1000_SECURITY_SOURCES}
73		BL31_SOURCES += ${CORSTONE1000_SECURITY_SOURCES}
74	endif
75endif
76
77FDT_SOURCES		+=	plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts
78CORSTONE1000_TOS_FW_CONFIG	:=	${BUILD_PLAT}/fdts/corstone1000_spmc_manifest.dtb
79
80# Add the SPMC manifest to FIP and specify the same to certtool
81$(eval $(call TOOL_ADD_PAYLOAD,${CORSTONE1000_TOS_FW_CONFIG},--tos-fw-config,${CORSTONE1000_TOS_FW_CONFIG}))
82
83# Adding TARGET_PLATFORM as a GCC define (-D option)
84$(eval $(call add_define,TARGET_PLATFORM_$(call uppercase,${TARGET_PLATFORM})))
85
86# Adding CORSTONE1000_FW_NVCTR_VAL as a GCC define (-D option)
87$(eval $(call add_define,CORSTONE1000_FW_NVCTR_VAL))
88
89include plat/arm/common/arm_common.mk
90include plat/arm/board/common/board_common.mk
91