xref: /rk3399_ARM-atf/plat/arm/board/corstone1000/platform.mk (revision b0236d0a21ea33d71628052a3fb7c3c22f3f9c58) 
1#
2# Copyright (c) 2021-2025 Arm Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7# Making sure the corstone1000 platform type is specified
8ifeq ($(filter ${TARGET_PLATFORM}, fpga fvp),)
9        $(error TARGET_PLATFORM must be fpga or fvp)
10endif
11
12CORSTONE1000_CPU_LIBS	+=lib/cpus/aarch64/cortex_a35.S
13
14PLAT_INCLUDES		:=	-Iplat/arm/board/corstone1000/common/include	\
15				-Iplat/arm/board/corstone1000/include		\
16				-Iinclude/plat/arm/common			\
17				-Iinclude/plat/arm/css/common/aarch64
18
19override ARM_PLAT_PROVIDES_BL2_MEM_PARAMS	:=	1
20
21CORSTONE1000_FW_NVCTR_VAL	:=	255
22TFW_NVCTR_VAL		:=	${CORSTONE1000_FW_NVCTR_VAL}
23NTFW_NVCTR_VAL		:=	${CORSTONE1000_FW_NVCTR_VAL}
24
25override NEED_BL1	:=	no
26
27override NEED_BL2	:=	yes
28FIP_BL2_ARGS := tb-fw
29
30override NEED_BL2U	:=	no
31override NEED_BL31	:=	yes
32NEED_BL32		?=	yes
33override NEED_BL33	:=	yes
34
35# Add CORSTONE1000_WITH_BL32 as a preprocessor define (-D option)
36ifeq (${NEED_BL32},yes)
37$(eval $(call add_define,CORSTONE1000_WITH_BL32))
38endif
39
40ENABLE_MULTICORE       :=      0
41ifneq ($(filter ${TARGET_PLATFORM}, fvp),)
42ifeq (${ENABLE_MULTICORE},1)
43$(eval $(call add_define,CORSTONE1000_FVP_MULTICORE))
44endif
45endif
46
47USE_GIC_DRIVER			:=	2
48
49BL2_SOURCES		+=	plat/arm/board/corstone1000/common/corstone1000_security.c		\
50				plat/arm/board/corstone1000/common/corstone1000_err.c		\
51				plat/arm/board/corstone1000/common/corstone1000_trusted_boot.c	\
52				lib/utils/mem_region.c					\
53				lib/cpus/aarch64/cpu_helpers.S \
54				plat/arm/board/corstone1000/common/corstone1000_helpers.S		\
55				plat/arm/board/corstone1000/common/corstone1000_plat.c		\
56				plat/arm/board/corstone1000/common/corstone1000_bl2_mem_params_desc.c \
57				${CORSTONE1000_CPU_LIBS}					\
58
59
60BL31_SOURCES	+=	drivers/cfi/v2m/v2m_flash.c				\
61			lib/utils/mem_region.c					\
62			plat/arm/board/corstone1000/common/corstone1000_helpers.S		\
63			plat/arm/board/corstone1000/common/corstone1000_topology.c		\
64			plat/arm/board/corstone1000/common/corstone1000_security.c		\
65			plat/arm/board/corstone1000/common/corstone1000_plat.c		\
66			plat/arm/board/corstone1000/common/corstone1000_pm.c		\
67			plat/arm/board/corstone1000/common/corstone1000_bl31_setup.c	\
68			${CORSTONE1000_CPU_LIBS}
69
70ifneq (${ENABLE_STACK_PROTECTOR},0)
71	ifneq (${ENABLE_STACK_PROTECTOR},none)
72		CORSTONE1000_SECURITY_SOURCES := plat/arm/board/corstone1000/common/corstone1000_stack_protector.c
73		BL2_SOURCES += ${CORSTONE1000_SECURITY_SOURCES}
74		BL31_SOURCES += ${CORSTONE1000_SECURITY_SOURCES}
75	endif
76endif
77
78FDT_SOURCES		+=	plat/arm/board/corstone1000/common/fdts/corstone1000_spmc_manifest.dts
79CORSTONE1000_TOS_FW_CONFIG	:=	${BUILD_PLAT}/fdts/corstone1000_spmc_manifest.dtb
80
81# Add the SPMC manifest to FIP and specify the same to certtool
82$(eval $(call TOOL_ADD_PAYLOAD,${CORSTONE1000_TOS_FW_CONFIG},--tos-fw-config,${CORSTONE1000_TOS_FW_CONFIG}))
83
84# Adding TARGET_PLATFORM as a GCC define (-D option)
85$(eval $(call add_define,TARGET_PLATFORM_$(call uppercase,${TARGET_PLATFORM})))
86
87# Adding CORSTONE1000_FW_NVCTR_VAL as a GCC define (-D option)
88$(eval $(call add_define,CORSTONE1000_FW_NVCTR_VAL))
89
90include plat/arm/common/arm_common.mk
91include plat/arm/board/common/board_common.mk
92