1536d906aSOliver Swede /* 2536d906aSOliver Swede * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. 3536d906aSOliver Swede * 4536d906aSOliver Swede * SPDX-License-Identifier: BSD-3-Clause 5536d906aSOliver Swede */ 6536d906aSOliver Swede 7536d906aSOliver Swede #ifndef FPGA_PRIVATE_H 8536d906aSOliver Swede #define FPGA_PRIVATE_H 9536d906aSOliver Swede 10536d906aSOliver Swede unsigned int plat_fpga_calc_core_pos(u_register_t mpidr); 11536d906aSOliver Swede 12536d906aSOliver Swede void fpga_console_init(void); 13536d906aSOliver Swede 14*87762bceSOliver Swede void plat_fpga_gic_init(void); 15*87762bceSOliver Swede void fpga_pwr_gic_on_finish(void); 16*87762bceSOliver Swede void fpga_pwr_gic_off(void); 17*87762bceSOliver Swede 18536d906aSOliver Swede #endif 19