xref: /rk3399_ARM-atf/plat/arm/board/arm_fpga/fpga_bl31_setup.c (revision 536d906abcc623a54e3ee9f48417258695f67d24)
1 /*
2  * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <plat/common/platform.h>
8 #include <platform_def.h>
9 
10 #include "fpga_private.h"
11 
12 void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
13 				u_register_t arg2, u_register_t arg3)
14 {
15 	fpga_console_init();
16 	/*
17 	 * TODO: implement any extra early platform setup before jumping to BL33
18 	 * payload
19 	 */
20 }
21 
22 void bl31_plat_arch_setup(void)
23 {
24 }
25 
26 void bl31_platform_setup(void)
27 {
28 	/* TODO: initialize GIC and timer using the specifications of the FPGA image */
29 }
30 
31 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type)
32 {
33 	/*
34 	 * TODO: return entry_point_info_t struct containing information about the
35 	 *       BL33 payload, which will run in EL2NS mode.
36 	 */
37 	return NULL;
38 }
39 
40 unsigned int plat_get_syscnt_freq2(void)
41 {
42 	/*
43 	 * TODO: return the frequency of the System Counter as configured by the
44 	 * FPGA image
45 	 */
46 	return 0;
47 }
48 
49 void bl31_plat_enable_mmu(uint32_t flags)
50 {
51 	/* TODO: determine if MMU needs to be enabled */
52 }
53