1/* 2 * Copyright (c) 2020, ARM Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 * Linker script for the Arm Ltd. FPGA boards to generate an ELF file that 7 * contains the ROM trampoline, BL31 and the DTB. 8 * 9 * This allows to pass just one file to the uploader tool, and automatically 10 * provides the correct load addresses. 11 */ 12 13#include <platform_def.h> 14 15OUTPUT_FORMAT("elf64-littleaarch64") 16OUTPUT_ARCH(aarch64) 17 18INPUT(./bl31/bl31.elf) 19INPUT(./rom_trampoline.o) 20INPUT(./kernel_trampoline.o) 21 22TARGET(binary) 23INPUT(./fdts/arm_fpga.dtb) 24 25ENTRY(_start) 26 27SECTIONS 28{ 29 .rom (0x0): { 30 *rom_trampoline.o(.text*) 31 KEEP(*(.rom)) 32 } 33 34 .bl31 (BL31_BASE): { 35 ASSERT(. == ALIGN(PAGE_SIZE), "BL31_BASE is not page aligned"); 36 *bl31.elf(.text* .data* .rodata* ro* .bss*) 37 *bl31.elf(.stack) 38 } 39 40 .dtb (FPGA_PRELOADED_DTB_BASE): { 41 ASSERT(. == ALIGN(8), "DTB address is not 8-byte aligned"); 42 *arm_fpga.dtb 43 } 44 45 .kern_tramp (PRELOADED_BL33_BASE): { 46 *kernel_trampoline.o(.text*) 47 KEEP(*(.kern_tramp)) 48 } 49 50 /DISCARD/ : { *(.debug_*) } 51 /DISCARD/ : { *(.note*) } 52 /DISCARD/ : { *(.comment*) } 53} 54