1*4a079c75SCarlo Caione# 2*4a079c75SCarlo Caione# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3*4a079c75SCarlo Caione# 4*4a079c75SCarlo Caione# SPDX-License-Identifier: BSD-3-Clause 5*4a079c75SCarlo Caione# 6*4a079c75SCarlo Caione 7*4a079c75SCarlo Caioneinclude lib/xlat_tables_v2/xlat_tables.mk 8*4a079c75SCarlo Caione 9*4a079c75SCarlo CaioneDOIMAGEPATH ?= tools/amlogic 10*4a079c75SCarlo CaioneDOIMAGETOOL ?= ${DOIMAGEPATH}/doimage 11*4a079c75SCarlo Caione 12*4a079c75SCarlo CaionePLAT_INCLUDES := -Iinclude/drivers/amlogic/ \ 13*4a079c75SCarlo Caione -Iinclude/drivers/amlogic/gxl \ 14*4a079c75SCarlo Caione -Iplat/amlogic/gxl/include 15*4a079c75SCarlo Caione 16*4a079c75SCarlo CaioneGXBB_GIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 17*4a079c75SCarlo Caione drivers/arm/gic/v2/gicv2_main.c \ 18*4a079c75SCarlo Caione drivers/arm/gic/v2/gicv2_helpers.c \ 19*4a079c75SCarlo Caione plat/common/plat_gicv2.c 20*4a079c75SCarlo Caione 21*4a079c75SCarlo CaionePLAT_BL_COMMON_SOURCES := drivers/amlogic/console/aarch64/meson_console.S \ 22*4a079c75SCarlo Caione plat/amlogic/gxl/gxl_common.c \ 23*4a079c75SCarlo Caione plat/amlogic/gxl/gxl_topology.c \ 24*4a079c75SCarlo Caione ${XLAT_TABLES_LIB_SRCS} 25*4a079c75SCarlo Caione 26*4a079c75SCarlo CaioneBL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ 27*4a079c75SCarlo Caione plat/common/plat_psci_common.c \ 28*4a079c75SCarlo Caione plat/amlogic/gxl/aarch64/gxl_helpers.S \ 29*4a079c75SCarlo Caione plat/amlogic/gxl/gxl_bl31_setup.c \ 30*4a079c75SCarlo Caione plat/amlogic/gxl/gxl_efuse.c \ 31*4a079c75SCarlo Caione plat/amlogic/gxl/gxl_mhu.c \ 32*4a079c75SCarlo Caione plat/amlogic/gxl/gxl_pm.c \ 33*4a079c75SCarlo Caione plat/amlogic/gxl/gxl_scpi.c \ 34*4a079c75SCarlo Caione plat/amlogic/gxl/gxl_sip_svc.c \ 35*4a079c75SCarlo Caione plat/amlogic/gxl/gxl_thermal.c \ 36*4a079c75SCarlo Caione drivers/amlogic/gxl/crypto/sha_dma.c \ 37*4a079c75SCarlo Caione ${GXBB_GIC_SOURCES} 38*4a079c75SCarlo Caione 39*4a079c75SCarlo Caione# Tune compiler for Cortex-A53 40*4a079c75SCarlo Caioneifeq ($(notdir $(CC)),armclang) 41*4a079c75SCarlo Caione TF_CFLAGS_aarch64 += -mcpu=cortex-a53 42*4a079c75SCarlo Caioneelse ifneq ($(findstring clang,$(notdir $(CC))),) 43*4a079c75SCarlo Caione TF_CFLAGS_aarch64 += -mcpu=cortex-a53 44*4a079c75SCarlo Caioneelse 45*4a079c75SCarlo Caione TF_CFLAGS_aarch64 += -mtune=cortex-a53 46*4a079c75SCarlo Caioneendif 47*4a079c75SCarlo Caione 48*4a079c75SCarlo Caione# Build config flags 49*4a079c75SCarlo Caione# ------------------ 50*4a079c75SCarlo Caione 51*4a079c75SCarlo Caione# Enable all errata workarounds for Cortex-A53 52*4a079c75SCarlo CaioneERRATA_A53_855873 := 1 53*4a079c75SCarlo CaioneERRATA_A53_819472 := 1 54*4a079c75SCarlo CaioneERRATA_A53_824069 := 1 55*4a079c75SCarlo CaioneERRATA_A53_827319 := 1 56*4a079c75SCarlo Caione 57*4a079c75SCarlo CaioneWORKAROUND_CVE_2017_5715 := 0 58*4a079c75SCarlo Caione 59*4a079c75SCarlo Caione# Have different sections for code and rodata 60*4a079c75SCarlo CaioneSEPARATE_CODE_AND_RODATA := 1 61*4a079c75SCarlo Caione 62*4a079c75SCarlo Caione# Use Coherent memory 63*4a079c75SCarlo CaioneUSE_COHERENT_MEM := 1 64*4a079c75SCarlo Caione 65*4a079c75SCarlo Caione# Verify build config 66*4a079c75SCarlo Caione# ------------------- 67*4a079c75SCarlo Caione 68*4a079c75SCarlo Caioneifneq (${RESET_TO_BL31}, 0) 69*4a079c75SCarlo Caione $(error Error: gxl needs RESET_TO_BL31=0) 70*4a079c75SCarlo Caioneendif 71*4a079c75SCarlo Caione 72*4a079c75SCarlo Caioneifeq (${ARCH},aarch32) 73*4a079c75SCarlo Caione $(error Error: AArch32 not supported on gxl) 74*4a079c75SCarlo Caioneendif 75*4a079c75SCarlo Caione 76*4a079c75SCarlo Caioneall: ${BUILD_PLAT}/bl31.img 77*4a079c75SCarlo Caionedistclean realclean clean: cleanimage 78*4a079c75SCarlo Caione 79*4a079c75SCarlo Caionecleanimage: 80*4a079c75SCarlo Caione ${Q}${MAKE} -C ${DOIMAGEPATH} clean 81*4a079c75SCarlo Caione 82*4a079c75SCarlo Caione${DOIMAGETOOL}: 83*4a079c75SCarlo Caione ${Q}${MAKE} -C ${DOIMAGEPATH} 84*4a079c75SCarlo Caione 85*4a079c75SCarlo Caione${BUILD_PLAT}/bl31.img: ${BUILD_PLAT}/bl31.bin ${DOIMAGETOOL} 86*4a079c75SCarlo Caione ${DOIMAGETOOL} ${BUILD_PLAT}/bl31.bin ${BUILD_PLAT}/bl31.img 87*4a079c75SCarlo Caione 88