14a079c75SCarlo Caione# 24a079c75SCarlo Caione# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 34a079c75SCarlo Caione# 44a079c75SCarlo Caione# SPDX-License-Identifier: BSD-3-Clause 54a079c75SCarlo Caione# 64a079c75SCarlo Caione 74a079c75SCarlo Caioneinclude lib/xlat_tables_v2/xlat_tables.mk 84a079c75SCarlo Caione 91b250198SCarlo CaioneAML_PLAT := plat/amlogic 101b250198SCarlo CaioneAML_PLAT_SOC := ${AML_PLAT}/${PLAT} 1140fac1abSCarlo CaioneAML_PLAT_COMMON := ${AML_PLAT}/common 121b250198SCarlo Caione 134a079c75SCarlo CaioneDOIMAGEPATH ?= tools/amlogic 144a079c75SCarlo CaioneDOIMAGETOOL ?= ${DOIMAGEPATH}/doimage 154a079c75SCarlo Caione 164a079c75SCarlo CaionePLAT_INCLUDES := -Iinclude/drivers/amlogic/ \ 171b250198SCarlo Caione -I${AML_PLAT_SOC}/include 184a079c75SCarlo Caione 191b250198SCarlo CaioneGIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 204a079c75SCarlo Caione drivers/arm/gic/v2/gicv2_main.c \ 214a079c75SCarlo Caione drivers/arm/gic/v2/gicv2_helpers.c \ 224a079c75SCarlo Caione plat/common/plat_gicv2.c 234a079c75SCarlo Caione 244a079c75SCarlo CaionePLAT_BL_COMMON_SOURCES := drivers/amlogic/console/aarch64/meson_console.S \ 251b250198SCarlo Caione ${AML_PLAT_SOC}/gxl_common.c \ 261b250198SCarlo Caione ${AML_PLAT_SOC}/gxl_topology.c \ 274a079c75SCarlo Caione ${XLAT_TABLES_LIB_SRCS} 284a079c75SCarlo Caione 294a079c75SCarlo CaioneBL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ 304a079c75SCarlo Caione plat/common/plat_psci_common.c \ 3140fac1abSCarlo Caione ${AML_PLAT_COMMON}/aarch64/aml_helpers.S \ 321b250198SCarlo Caione ${AML_PLAT_SOC}/gxl_bl31_setup.c \ 331b250198SCarlo Caione ${AML_PLAT_SOC}/gxl_efuse.c \ 341b250198SCarlo Caione ${AML_PLAT_SOC}/gxl_mhu.c \ 351b250198SCarlo Caione ${AML_PLAT_SOC}/gxl_pm.c \ 361b250198SCarlo Caione ${AML_PLAT_SOC}/gxl_scpi.c \ 371b250198SCarlo Caione ${AML_PLAT_SOC}/gxl_sip_svc.c \ 381b250198SCarlo Caione ${AML_PLAT_SOC}/gxl_thermal.c \ 39*01b2a7fcSCarlo Caione drivers/amlogic/crypto/sha_dma.c \ 401b250198SCarlo Caione ${GIC_SOURCES} 414a079c75SCarlo Caione 424a079c75SCarlo Caione# Tune compiler for Cortex-A53 434a079c75SCarlo Caioneifeq ($(notdir $(CC)),armclang) 444a079c75SCarlo Caione TF_CFLAGS_aarch64 += -mcpu=cortex-a53 454a079c75SCarlo Caioneelse ifneq ($(findstring clang,$(notdir $(CC))),) 464a079c75SCarlo Caione TF_CFLAGS_aarch64 += -mcpu=cortex-a53 474a079c75SCarlo Caioneelse 484a079c75SCarlo Caione TF_CFLAGS_aarch64 += -mtune=cortex-a53 494a079c75SCarlo Caioneendif 504a079c75SCarlo Caione 514a079c75SCarlo Caione# Build config flags 524a079c75SCarlo Caione# ------------------ 534a079c75SCarlo Caione 544a079c75SCarlo Caione# Enable all errata workarounds for Cortex-A53 554a079c75SCarlo CaioneERRATA_A53_855873 := 1 564a079c75SCarlo CaioneERRATA_A53_819472 := 1 574a079c75SCarlo CaioneERRATA_A53_824069 := 1 584a079c75SCarlo CaioneERRATA_A53_827319 := 1 594a079c75SCarlo Caione 604a079c75SCarlo CaioneWORKAROUND_CVE_2017_5715 := 0 614a079c75SCarlo Caione 624a079c75SCarlo Caione# Have different sections for code and rodata 634a079c75SCarlo CaioneSEPARATE_CODE_AND_RODATA := 1 644a079c75SCarlo Caione 654a079c75SCarlo Caione# Use Coherent memory 664a079c75SCarlo CaioneUSE_COHERENT_MEM := 1 674a079c75SCarlo Caione 684a079c75SCarlo Caione# Verify build config 694a079c75SCarlo Caione# ------------------- 704a079c75SCarlo Caione 714a079c75SCarlo Caioneifneq (${RESET_TO_BL31}, 0) 721b250198SCarlo Caione $(error Error: ${PLAT} needs RESET_TO_BL31=0) 734a079c75SCarlo Caioneendif 744a079c75SCarlo Caione 754a079c75SCarlo Caioneifeq (${ARCH},aarch32) 761b250198SCarlo Caione $(error Error: AArch32 not supported on ${PLAT}) 774a079c75SCarlo Caioneendif 784a079c75SCarlo Caione 794a079c75SCarlo Caioneall: ${BUILD_PLAT}/bl31.img 804a079c75SCarlo Caionedistclean realclean clean: cleanimage 814a079c75SCarlo Caione 824a079c75SCarlo Caionecleanimage: 834a079c75SCarlo Caione ${Q}${MAKE} -C ${DOIMAGEPATH} clean 844a079c75SCarlo Caione 854a079c75SCarlo Caione${DOIMAGETOOL}: 864a079c75SCarlo Caione ${Q}${MAKE} -C ${DOIMAGEPATH} 874a079c75SCarlo Caione 884a079c75SCarlo Caione${BUILD_PLAT}/bl31.img: ${BUILD_PLAT}/bl31.bin ${DOIMAGETOOL} 894a079c75SCarlo Caione ${DOIMAGETOOL} ${BUILD_PLAT}/bl31.bin ${BUILD_PLAT}/bl31.img 904a079c75SCarlo Caione 91