xref: /rk3399_ARM-atf/plat/amlogic/gxl/platform.mk (revision bba792b1652e027c15acb3ff4fa700c878a3d3fd)
14a079c75SCarlo Caione#
2ffb77421SChris Kay# Copyright (c) 2018-2024, Arm Limited and Contributors. All rights reserved.
34a079c75SCarlo Caione#
44a079c75SCarlo Caione# SPDX-License-Identifier: BSD-3-Clause
54a079c75SCarlo Caione#
64a079c75SCarlo Caione
74a079c75SCarlo Caioneinclude lib/xlat_tables_v2/xlat_tables.mk
84a079c75SCarlo Caione
91b250198SCarlo CaioneAML_PLAT		:=	plat/amlogic
101b250198SCarlo CaioneAML_PLAT_SOC		:=	${AML_PLAT}/${PLAT}
1140fac1abSCarlo CaioneAML_PLAT_COMMON		:=	${AML_PLAT}/common
121b250198SCarlo Caione
134a079c75SCarlo CaioneDOIMAGEPATH		?=	tools/amlogic
144a079c75SCarlo CaioneDOIMAGETOOL		?=	${DOIMAGEPATH}/doimage
154a079c75SCarlo Caione
164a079c75SCarlo CaionePLAT_INCLUDES		:=	-Iinclude/drivers/amlogic/			\
1769b315aaSCarlo Caione				-I${AML_PLAT_SOC}/include			\
1869b315aaSCarlo Caione				-I${AML_PLAT_COMMON}/include
194a079c75SCarlo Caione
201b250198SCarlo CaioneGIC_SOURCES		:=	drivers/arm/gic/common/gic_common.c		\
214a079c75SCarlo Caione				drivers/arm/gic/v2/gicv2_main.c			\
224a079c75SCarlo Caione				drivers/arm/gic/v2/gicv2_helpers.c		\
234a079c75SCarlo Caione				plat/common/plat_gicv2.c
244a079c75SCarlo Caione
254a079c75SCarlo CaioneBL31_SOURCES		+=	lib/cpus/aarch64/cortex_a53.S			\
264a079c75SCarlo Caione				plat/common/plat_psci_common.c			\
27fab69512SCarlo Caione				drivers/amlogic/console/aarch64/meson_console.S	\
28edcadeb7SCarlo Caione				${AML_PLAT_SOC}/${PLAT}_bl31_setup.c		\
29edcadeb7SCarlo Caione				${AML_PLAT_SOC}/${PLAT}_pm.c			\
30edcadeb7SCarlo Caione				${AML_PLAT_SOC}/${PLAT}_common.c		\
31fab69512SCarlo Caione				${AML_PLAT_COMMON}/aarch64/aml_helpers.S	\
32d498d249SCarlo Caione				${AML_PLAT_COMMON}/aml_efuse.c			\
336f3b0dc4SCarlo Caione				${AML_PLAT_COMMON}/aml_mhu.c			\
3469b315aaSCarlo Caione				${AML_PLAT_COMMON}/aml_scpi.c			\
3535aee24eSCarlo Caione				${AML_PLAT_COMMON}/aml_sip_svc.c		\
36cd94cc40SCarlo Caione				${AML_PLAT_COMMON}/aml_thermal.c		\
37fab69512SCarlo Caione				${AML_PLAT_COMMON}/aml_topology.c		\
38a759d345SCarlo Caione				${AML_PLAT_COMMON}/aml_console.c		\
3901b2a7fcSCarlo Caione				drivers/amlogic/crypto/sha_dma.c		\
40fab69512SCarlo Caione				${XLAT_TABLES_LIB_SRCS}				\
411b250198SCarlo Caione				${GIC_SOURCES}
424a079c75SCarlo Caione
43*8dca65d9SFerass El Hafidiifeq (${AML_STDPARAMS}, 1)
44*8dca65d9SFerass El Hafidi    BL31_SOURCES	+=	common/desc_image_load.c
45*8dca65d9SFerass El Hafidi    $(eval $(call add_define_val,AML_STDPARAMS,'$(AML_STDPARAMS)'))
46*8dca65d9SFerass El Hafidi    $(info "Building with standard params")
47*8dca65d9SFerass El Hafidiendif
48*8dca65d9SFerass El Hafidi
494a079c75SCarlo Caione# Tune compiler for Cortex-A53
508620bd0bSChris Kayifeq ($($(ARCH)-cc-id),arm-clang)
514a079c75SCarlo Caione    TF_CFLAGS_aarch64	+=	-mcpu=cortex-a53
528620bd0bSChris Kayelse ifneq ($(filter %-clang,$($(ARCH)-cc-id)),)
534a079c75SCarlo Caione    TF_CFLAGS_aarch64	+=	-mcpu=cortex-a53
544a079c75SCarlo Caioneelse
554a079c75SCarlo Caione    TF_CFLAGS_aarch64	+=	-mtune=cortex-a53
564a079c75SCarlo Caioneendif
574a079c75SCarlo Caione
584a079c75SCarlo Caione# Build config flags
594a079c75SCarlo Caione# ------------------
604a079c75SCarlo Caione
614a079c75SCarlo Caione# Enable all errata workarounds for Cortex-A53
624a079c75SCarlo CaioneERRATA_A53_855873		:= 1
634a079c75SCarlo CaioneERRATA_A53_819472		:= 1
644a079c75SCarlo CaioneERRATA_A53_824069		:= 1
654a079c75SCarlo CaioneERRATA_A53_827319		:= 1
664a079c75SCarlo Caione
674a079c75SCarlo CaioneWORKAROUND_CVE_2017_5715	:= 0
684a079c75SCarlo Caione
694a079c75SCarlo Caione# Have different sections for code and rodata
704a079c75SCarlo CaioneSEPARATE_CODE_AND_RODATA	:= 1
714a079c75SCarlo Caione
724a079c75SCarlo Caione# Use Coherent memory
734a079c75SCarlo CaioneUSE_COHERENT_MEM		:= 1
744a079c75SCarlo Caione
754a079c75SCarlo Caione# Verify build config
764a079c75SCarlo Caione# -------------------
774a079c75SCarlo Caione
784a079c75SCarlo Caioneifneq (${RESET_TO_BL31}, 0)
791b250198SCarlo Caione  $(error Error: ${PLAT} needs RESET_TO_BL31=0)
804a079c75SCarlo Caioneendif
814a079c75SCarlo Caione
824a079c75SCarlo Caioneifeq (${ARCH},aarch32)
831b250198SCarlo Caione  $(error Error: AArch32 not supported on ${PLAT})
844a079c75SCarlo Caioneendif
854a079c75SCarlo Caione
864a079c75SCarlo Caioneall: ${BUILD_PLAT}/bl31.img
874a079c75SCarlo Caionedistclean realclean clean: cleanimage
884a079c75SCarlo Caione
894a079c75SCarlo Caionecleanimage:
907c4e1eeaSChris Kay	$(q)${MAKE} -C ${DOIMAGEPATH} clean
914a079c75SCarlo Caione
924a079c75SCarlo Caione${DOIMAGETOOL}:
937c4e1eeaSChris Kay	$(q)${MAKE} -C ${DOIMAGEPATH}
944a079c75SCarlo Caione
954a079c75SCarlo Caione${BUILD_PLAT}/bl31.img: ${BUILD_PLAT}/bl31.bin ${DOIMAGETOOL}
964a079c75SCarlo Caione	${DOIMAGETOOL} ${BUILD_PLAT}/bl31.bin ${BUILD_PLAT}/bl31.img
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