169b315aaSCarlo Caione /* 269b315aaSCarlo Caione * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 369b315aaSCarlo Caione * 469b315aaSCarlo Caione * SPDX-License-Identifier: BSD-3-Clause 569b315aaSCarlo Caione */ 669b315aaSCarlo Caione 769b315aaSCarlo Caione #ifndef GXBB_PRIVATE_H 869b315aaSCarlo Caione #define GXBB_PRIVATE_H 969b315aaSCarlo Caione 1069b315aaSCarlo Caione #include <stddef.h> 1169b315aaSCarlo Caione #include <stdint.h> 1269b315aaSCarlo Caione 1369b315aaSCarlo Caione /* Utility functions */ 14f681c676SCarlo Caione unsigned int plat_calc_core_pos(u_register_t mpidr); 15010fdc1bSCarlo Caione void aml_console_init(void); 16010fdc1bSCarlo Caione void aml_setup_page_tables(void); 1769b315aaSCarlo Caione 1869b315aaSCarlo Caione /* MHU functions */ 1969b315aaSCarlo Caione void mhu_secure_message_start(void); 2069b315aaSCarlo Caione void mhu_secure_message_send(uint32_t msg); 2169b315aaSCarlo Caione uint32_t mhu_secure_message_wait(void); 2269b315aaSCarlo Caione void mhu_secure_message_end(void); 2369b315aaSCarlo Caione void mhu_secure_init(void); 2469b315aaSCarlo Caione 2569b315aaSCarlo Caione /* SCPI functions */ 2669b315aaSCarlo Caione void scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state, 2769b315aaSCarlo Caione uint32_t cluster_state, uint32_t css_state); 2869b315aaSCarlo Caione uint32_t scpi_sys_power_state(uint64_t system_state); 2969b315aaSCarlo Caione void scpi_jtag_set_state(uint32_t state, uint8_t select); 3069b315aaSCarlo Caione uint32_t scpi_efuse_read(void *dst, uint32_t base, uint32_t size); 3169b315aaSCarlo Caione void scpi_unknown_thermal(uint32_t arg0, uint32_t arg1, 3269b315aaSCarlo Caione uint32_t arg2, uint32_t arg3); 3369b315aaSCarlo Caione void scpi_upload_scp_fw(uintptr_t addr, size_t size, int send); 3469b315aaSCarlo Caione 3569b315aaSCarlo Caione /* Peripherals */ 36*73f6d057SCarlo Caione void aml_thermal_unknown(void); 3793c795aeSCarlo Caione uint64_t aml_efuse_read(void *dst, uint32_t offset, uint32_t size); 3893c795aeSCarlo Caione uint64_t aml_efuse_user_max(void); 3969b315aaSCarlo Caione 4069b315aaSCarlo Caione #endif /* GXBB_PRIVATE_H */ 41