1*69b315aaSCarlo Caione /* 2*69b315aaSCarlo Caione * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3*69b315aaSCarlo Caione * 4*69b315aaSCarlo Caione * SPDX-License-Identifier: BSD-3-Clause 5*69b315aaSCarlo Caione */ 6*69b315aaSCarlo Caione 7*69b315aaSCarlo Caione #ifndef GXBB_PRIVATE_H 8*69b315aaSCarlo Caione #define GXBB_PRIVATE_H 9*69b315aaSCarlo Caione 10*69b315aaSCarlo Caione #include <stddef.h> 11*69b315aaSCarlo Caione #include <stdint.h> 12*69b315aaSCarlo Caione 13*69b315aaSCarlo Caione /* Utility functions */ 14*69b315aaSCarlo Caione unsigned int plat_gxbb_calc_core_pos(u_register_t mpidr); 15*69b315aaSCarlo Caione void gxbb_console_init(void); 16*69b315aaSCarlo Caione void gxbb_setup_page_tables(void); 17*69b315aaSCarlo Caione 18*69b315aaSCarlo Caione /* MHU functions */ 19*69b315aaSCarlo Caione void mhu_secure_message_start(void); 20*69b315aaSCarlo Caione void mhu_secure_message_send(uint32_t msg); 21*69b315aaSCarlo Caione uint32_t mhu_secure_message_wait(void); 22*69b315aaSCarlo Caione void mhu_secure_message_end(void); 23*69b315aaSCarlo Caione void mhu_secure_init(void); 24*69b315aaSCarlo Caione 25*69b315aaSCarlo Caione /* SCPI functions */ 26*69b315aaSCarlo Caione void scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state, 27*69b315aaSCarlo Caione uint32_t cluster_state, uint32_t css_state); 28*69b315aaSCarlo Caione uint32_t scpi_sys_power_state(uint64_t system_state); 29*69b315aaSCarlo Caione void scpi_jtag_set_state(uint32_t state, uint8_t select); 30*69b315aaSCarlo Caione uint32_t scpi_efuse_read(void *dst, uint32_t base, uint32_t size); 31*69b315aaSCarlo Caione void scpi_unknown_thermal(uint32_t arg0, uint32_t arg1, 32*69b315aaSCarlo Caione uint32_t arg2, uint32_t arg3); 33*69b315aaSCarlo Caione void scpi_upload_scp_fw(uintptr_t addr, size_t size, int send); 34*69b315aaSCarlo Caione 35*69b315aaSCarlo Caione /* Peripherals */ 36*69b315aaSCarlo Caione void gxbb_thermal_unknown(void); 37*69b315aaSCarlo Caione uint64_t gxbb_efuse_read(void *dst, uint32_t offset, uint32_t size); 38*69b315aaSCarlo Caione uint64_t gxbb_efuse_user_max(void); 39*69b315aaSCarlo Caione 40*69b315aaSCarlo Caione #endif /* GXBB_PRIVATE_H */ 41