169b315aaSCarlo Caione /* 269b315aaSCarlo Caione * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 369b315aaSCarlo Caione * 469b315aaSCarlo Caione * SPDX-License-Identifier: BSD-3-Clause 569b315aaSCarlo Caione */ 669b315aaSCarlo Caione 7421b67b6SCarlo Caione #ifndef AML_PRIVATE_H 8421b67b6SCarlo Caione #define AML_PRIVATE_H 969b315aaSCarlo Caione 1069b315aaSCarlo Caione #include <stddef.h> 1169b315aaSCarlo Caione #include <stdint.h> 1269b315aaSCarlo Caione 1369b315aaSCarlo Caione /* Utility functions */ 14f681c676SCarlo Caione unsigned int plat_calc_core_pos(u_register_t mpidr); 15010fdc1bSCarlo Caione void aml_console_init(void); 16010fdc1bSCarlo Caione void aml_setup_page_tables(void); 1769b315aaSCarlo Caione 1869b315aaSCarlo Caione /* MHU functions */ 19cbaad533SCarlo Caione void aml_mhu_secure_message_start(void); 20cbaad533SCarlo Caione void aml_mhu_secure_message_send(uint32_t msg); 21cbaad533SCarlo Caione uint32_t aml_mhu_secure_message_wait(void); 22cbaad533SCarlo Caione void aml_mhu_secure_message_end(void); 23cbaad533SCarlo Caione void aml_mhu_secure_init(void); 2469b315aaSCarlo Caione 2569b315aaSCarlo Caione /* SCPI functions */ 269a5616faSCarlo Caione void aml_scpi_set_css_power_state(u_register_t mpidr, uint32_t cpu_state, 2769b315aaSCarlo Caione uint32_t cluster_state, uint32_t css_state); 289a5616faSCarlo Caione uint32_t aml_scpi_sys_power_state(uint64_t system_state); 299a5616faSCarlo Caione void aml_scpi_jtag_set_state(uint32_t state, uint8_t select); 309a5616faSCarlo Caione uint32_t aml_scpi_efuse_read(void *dst, uint32_t base, uint32_t size); 319a5616faSCarlo Caione void aml_scpi_unknown_thermal(uint32_t arg0, uint32_t arg1, 3269b315aaSCarlo Caione uint32_t arg2, uint32_t arg3); 339a5616faSCarlo Caione void aml_scpi_upload_scp_fw(uintptr_t addr, size_t size, int send); 34*5cfdfc3cSCarlo Caione uint32_t aml_scpi_get_chip_id(uint8_t *obuff, uint32_t osize); 3569b315aaSCarlo Caione 3669b315aaSCarlo Caione /* Peripherals */ 3773f6d057SCarlo Caione void aml_thermal_unknown(void); 3893c795aeSCarlo Caione uint64_t aml_efuse_read(void *dst, uint32_t offset, uint32_t size); 3993c795aeSCarlo Caione uint64_t aml_efuse_user_max(void); 4069b315aaSCarlo Caione 41421b67b6SCarlo Caione #endif /* AML_PRIVATE_H */ 42