1 /* 2 * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <common/debug.h> 8 #include <common/runtime_svc.h> 9 #include <lib/mmio.h> 10 #include <platform_def.h> 11 #include <stdint.h> 12 #include <string.h> 13 14 #include "aml_private.h" 15 16 struct aml_cpu_info { 17 uint32_t version; 18 uint8_t chip_id[16]; 19 }; 20 21 static int aml_sip_get_chip_id(uint64_t version) 22 { 23 struct aml_cpu_info *info = (void *)AML_SHARE_MEM_OUTPUT_BASE; 24 uint32_t size; 25 26 if (version > 2) 27 return -1; 28 29 memset(info, 0, sizeof(struct aml_cpu_info)); 30 31 if (version == 2) { 32 info->version = 2; 33 size = 16; 34 } else { 35 info->version = 1; 36 size = 12; 37 } 38 39 if (aml_scpi_get_chip_id(info->chip_id, size) == 0) 40 return -1; 41 42 return 0; 43 } 44 45 /******************************************************************************* 46 * This function is responsible for handling all SiP calls 47 ******************************************************************************/ 48 static uintptr_t aml_sip_handler(uint32_t smc_fid, 49 u_register_t x1, u_register_t x2, 50 u_register_t x3, u_register_t x4, 51 void *cookie, void *handle, 52 u_register_t flags) 53 { 54 switch (smc_fid) { 55 56 case AML_SM_GET_SHARE_MEM_INPUT_BASE: 57 SMC_RET1(handle, AML_SHARE_MEM_INPUT_BASE); 58 59 case AML_SM_GET_SHARE_MEM_OUTPUT_BASE: 60 SMC_RET1(handle, AML_SHARE_MEM_OUTPUT_BASE); 61 62 case AML_SM_EFUSE_READ: 63 { 64 void *dst = (void *)AML_SHARE_MEM_OUTPUT_BASE; 65 uint64_t ret = aml_efuse_read(dst, (uint32_t)x1, x2); 66 67 SMC_RET1(handle, ret); 68 } 69 case AML_SM_EFUSE_USER_MAX: 70 SMC_RET1(handle, aml_efuse_user_max()); 71 72 case AML_SM_JTAG_ON: 73 aml_scpi_jtag_set_state(AML_JTAG_STATE_ON, x1); 74 SMC_RET1(handle, 0); 75 76 case AML_SM_JTAG_OFF: 77 aml_scpi_jtag_set_state(AML_JTAG_STATE_OFF, x1); 78 SMC_RET1(handle, 0); 79 80 case AML_SM_GET_CHIP_ID: 81 SMC_RET1(handle, aml_sip_get_chip_id(x1)); 82 83 default: 84 ERROR("BL31: Unhandled SIP SMC: 0x%08x\n", smc_fid); 85 break; 86 } 87 88 SMC_RET1(handle, SMC_UNK); 89 } 90 91 DECLARE_RT_SVC( 92 aml_sip_handler, 93 94 OEN_SIP_START, 95 OEN_SIP_END, 96 SMC_TYPE_FAST, 97 NULL, 98 aml_sip_handler 99 ); 100