1afd241e7SCarlo Caione# 2ffb77421SChris Kay# Copyright (c) 2020-2024, Arm Limited and Contributors. All rights reserved. 3afd241e7SCarlo Caione# 4afd241e7SCarlo Caione# SPDX-License-Identifier: BSD-3-Clause 5afd241e7SCarlo Caione# 6afd241e7SCarlo Caione 7afd241e7SCarlo Caioneinclude lib/xlat_tables_v2/xlat_tables.mk 8afd241e7SCarlo Caione 9afd241e7SCarlo CaioneAML_PLAT := plat/amlogic 10afd241e7SCarlo CaioneAML_PLAT_SOC := ${AML_PLAT}/${PLAT} 11afd241e7SCarlo CaioneAML_PLAT_COMMON := ${AML_PLAT}/common 12afd241e7SCarlo Caione 13afd241e7SCarlo CaioneDOIMAGEPATH ?= tools/amlogic 14afd241e7SCarlo CaioneDOIMAGETOOL ?= ${DOIMAGEPATH}/doimage 15afd241e7SCarlo Caione 16afd241e7SCarlo CaionePLAT_INCLUDES := -Iinclude/drivers/amlogic/ \ 17afd241e7SCarlo Caione -I${AML_PLAT_SOC}/include \ 18afd241e7SCarlo Caione -I${AML_PLAT_COMMON}/include 19afd241e7SCarlo Caione 20afd241e7SCarlo CaioneGIC_SOURCES := drivers/arm/gic/common/gic_common.c \ 21afd241e7SCarlo Caione drivers/arm/gic/v2/gicv2_main.c \ 22afd241e7SCarlo Caione drivers/arm/gic/v2/gicv2_helpers.c \ 23afd241e7SCarlo Caione plat/common/plat_gicv2.c 24afd241e7SCarlo Caione 25afd241e7SCarlo CaioneBL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ 26afd241e7SCarlo Caione plat/common/plat_psci_common.c \ 27afd241e7SCarlo Caione drivers/amlogic/console/aarch64/meson_console.S \ 28afd241e7SCarlo Caione ${AML_PLAT_SOC}/${PLAT}_bl31_setup.c \ 29afd241e7SCarlo Caione ${AML_PLAT_SOC}/${PLAT}_pm.c \ 30afd241e7SCarlo Caione ${AML_PLAT_SOC}/${PLAT}_common.c \ 31afd241e7SCarlo Caione ${AML_PLAT_COMMON}/aarch64/aml_helpers.S \ 32afd241e7SCarlo Caione ${AML_PLAT_COMMON}/aml_efuse.c \ 33afd241e7SCarlo Caione ${AML_PLAT_COMMON}/aml_mhu.c \ 34afd241e7SCarlo Caione ${AML_PLAT_COMMON}/aml_scpi.c \ 35afd241e7SCarlo Caione ${AML_PLAT_COMMON}/aml_sip_svc.c \ 36afd241e7SCarlo Caione ${AML_PLAT_COMMON}/aml_thermal.c \ 37afd241e7SCarlo Caione ${AML_PLAT_COMMON}/aml_topology.c \ 38afd241e7SCarlo Caione ${AML_PLAT_COMMON}/aml_console.c \ 39afd241e7SCarlo Caione drivers/amlogic/crypto/sha_dma.c \ 40afd241e7SCarlo Caione ${XLAT_TABLES_LIB_SRCS} \ 41afd241e7SCarlo Caione ${GIC_SOURCES} 42afd241e7SCarlo Caione 43afd241e7SCarlo Caione# Tune compiler for Cortex-A53 44*8620bd0bSChris Kayifeq ($($(ARCH)-cc-id),arm-clang) 45afd241e7SCarlo Caione TF_CFLAGS_aarch64 += -mcpu=cortex-a53 46*8620bd0bSChris Kayelse ifneq ($(filter %-clang,$($(ARCH)-cc-id)),) 47afd241e7SCarlo Caione TF_CFLAGS_aarch64 += -mcpu=cortex-a53 48afd241e7SCarlo Caioneelse 49afd241e7SCarlo Caione TF_CFLAGS_aarch64 += -mtune=cortex-a53 50afd241e7SCarlo Caioneendif 51afd241e7SCarlo Caione 52afd241e7SCarlo Caione# Build config flags 53afd241e7SCarlo Caione# ------------------ 54afd241e7SCarlo Caione 55afd241e7SCarlo Caione# Enable all errata workarounds for Cortex-A53 56afd241e7SCarlo CaioneERRATA_A53_855873 := 1 57afd241e7SCarlo CaioneERRATA_A53_819472 := 1 58afd241e7SCarlo CaioneERRATA_A53_824069 := 1 59afd241e7SCarlo CaioneERRATA_A53_827319 := 1 60afd241e7SCarlo Caione 61afd241e7SCarlo CaioneWORKAROUND_CVE_2017_5715 := 0 62afd241e7SCarlo Caione 63afd241e7SCarlo Caione# Have different sections for code and rodata 64afd241e7SCarlo CaioneSEPARATE_CODE_AND_RODATA := 1 65afd241e7SCarlo Caione 66afd241e7SCarlo Caione# Use Coherent memory 67afd241e7SCarlo CaioneUSE_COHERENT_MEM := 1 68afd241e7SCarlo Caione 6972d2535aSCarlo CaioneAML_USE_ATOS := 0 7072d2535aSCarlo Caione$(eval $(call assert_boolean,AML_USE_ATOS)) 7172d2535aSCarlo Caione$(eval $(call add_define,AML_USE_ATOS)) 7272d2535aSCarlo Caione 73afd241e7SCarlo Caione# Verify build config 74afd241e7SCarlo Caione# ------------------- 75afd241e7SCarlo Caione 76afd241e7SCarlo Caioneifneq (${RESET_TO_BL31}, 0) 77afd241e7SCarlo Caione $(error Error: ${PLAT} needs RESET_TO_BL31=0) 78afd241e7SCarlo Caioneendif 79afd241e7SCarlo Caione 80afd241e7SCarlo Caioneifeq (${ARCH},aarch32) 81afd241e7SCarlo Caione $(error Error: AArch32 not supported on ${PLAT}) 82afd241e7SCarlo Caioneendif 83afd241e7SCarlo Caione 84afd241e7SCarlo Caioneall: ${BUILD_PLAT}/bl31.img 85afd241e7SCarlo Caionedistclean realclean clean: cleanimage 86afd241e7SCarlo Caione 87afd241e7SCarlo Caionecleanimage: 88afd241e7SCarlo Caione ${Q}${MAKE} -C ${DOIMAGEPATH} clean 89afd241e7SCarlo Caione 90afd241e7SCarlo Caione${DOIMAGETOOL}: 91afd241e7SCarlo Caione ${Q}${MAKE} -C ${DOIMAGEPATH} 92afd241e7SCarlo Caione 93afd241e7SCarlo Caione${BUILD_PLAT}/bl31.img: ${BUILD_PLAT}/bl31.bin ${DOIMAGETOOL} 94afd241e7SCarlo Caione ${DOIMAGETOOL} ${BUILD_PLAT}/bl31.bin ${BUILD_PLAT}/bl31.img 95