1 /* 2 * Copyright (c) 2022, Xilinx, Inc. All rights reserved. 3 * Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /* 9 * SoC IPI agent registers access management 10 */ 11 12 #include <lib/utils_def.h> 13 #include <plat_ipi.h> 14 15 /* versal2 ipi configuration table */ 16 static const struct ipi_config ipi_table[IPI_ID_MAX] = { 17 /* A78 IPI */ 18 [IPI_ID_APU] = { 19 .ipi_bit_mask = IPI0_TRIG_BIT, 20 .ipi_reg_base = IPI0_REG_BASE, 21 .secure_only = 0, 22 }, 23 24 /* PMC IPI */ 25 [IPI_ID_PMC] = { 26 .ipi_bit_mask = PMC_IPI_TRIG_BIT, 27 .ipi_reg_base = IPI0_REG_BASE, 28 .secure_only = IPI_SECURE_MASK, 29 }, 30 31 /* RPU0 IPI */ 32 [IPI_ID_RPU0] = { 33 .ipi_bit_mask = IPI1_TRIG_BIT, 34 .ipi_reg_base = IPI1_REG_BASE, 35 .secure_only = 0, 36 }, 37 38 /* RPU1 IPI */ 39 [IPI_ID_RPU1] = { 40 .ipi_bit_mask = IPI2_TRIG_BIT, 41 .ipi_reg_base = IPI2_REG_BASE, 42 .secure_only = 0, 43 }, 44 45 /* IPI3 IPI */ 46 [IPI_ID_3] = { 47 .ipi_bit_mask = IPI3_TRIG_BIT, 48 .ipi_reg_base = IPI3_REG_BASE, 49 .secure_only = 0, 50 }, 51 52 /* IPI4 IPI */ 53 [IPI_ID_4] = { 54 .ipi_bit_mask = IPI4_TRIG_BIT, 55 .ipi_reg_base = IPI4_REG_BASE, 56 .secure_only = 0, 57 }, 58 59 /* IPI5 IPI */ 60 [IPI_ID_5] = { 61 .ipi_bit_mask = IPI5_TRIG_BIT, 62 .ipi_reg_base = IPI5_REG_BASE, 63 .secure_only = 0, 64 }, 65 }; 66 67 /** 68 * soc_ipi_config_table_init() - Initialize versal2 IPI configuration data. 69 */ 70 void soc_ipi_config_table_init(void) 71 { 72 ipi_config_table_init(ipi_table, ARRAY_SIZE(ipi_table)); 73 } 74