1 /* 2 * Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved. 3 * Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /* 9 * Top-level SMC handler for Versal2 power management calls and 10 * IPI setup functions for communication with PMC. 11 */ 12 13 #include <errno.h> 14 #include <stdbool.h> 15 16 #include "../drivers/arm/gic/v3/gicv3_private.h" 17 18 #include <common/runtime_svc.h> 19 #include <drivers/arm/gicv3.h> 20 #include <lib/psci/psci.h> 21 #include <plat/arm/common/plat_arm.h> 22 #include <plat/common/platform.h> 23 24 #include <plat_private.h> 25 #include "pm_api_sys.h" 26 #include "pm_client.h" 27 #include "pm_ipi.h" 28 #include "pm_svc_main.h" 29 30 #define MODE 0x80000000U 31 32 #define INVALID_SGI 0xFFU 33 #define PM_INIT_SUSPEND_CB (30U) 34 #define PM_NOTIFY_CB (32U) 35 #define EVENT_CPU_PWRDWN (4U) 36 #define MBOX_SGI_SHARED_IPI (7U) 37 38 /** 39 * upper_32_bits - return bits 32-63 of a number 40 * @n: the number we're accessing 41 */ 42 #define upper_32_bits(n) ((uint32_t)((n) >> 32U)) 43 44 /** 45 * lower_32_bits - return bits 0-31 of a number 46 * @n: the number we're accessing 47 */ 48 #define lower_32_bits(n) ((uint32_t)((n) & 0xffffffffU)) 49 50 /** 51 * EXTRACT_SMC_ARGS - extracts 32-bit payloads from 64-bit SMC arguments 52 * @pm_arg: array of 32-bit payloads 53 * @x: array of 64-bit SMC arguments 54 */ 55 #define EXTRACT_ARGS(pm_arg, x) \ 56 for (uint32_t i = 0U; i < (PAYLOAD_ARG_CNT - 1U); i++) { \ 57 if ((i % 2U) != 0U) { \ 58 pm_arg[i] = lower_32_bits(x[(i / 2U) + 1U]); \ 59 } else { \ 60 pm_arg[i] = upper_32_bits(x[i / 2U]); \ 61 } \ 62 } 63 64 /* 1 sec of wait timeout for secondary core down */ 65 #define PWRDWN_WAIT_TIMEOUT (1000U) 66 DEFINE_RENAME_SYSREG_RW_FUNCS(icc_asgi1r_el1, S3_0_C12_C11_6) 67 68 /* pm_up = true - UP, pm_up = false - DOWN */ 69 static bool pm_up; 70 static uint32_t sgi = (uint32_t)INVALID_SGI; 71 bool pwrdwn_req_received; 72 73 static void notify_os(void) 74 { 75 plat_ic_raise_ns_sgi((int)sgi, read_mpidr_el1()); 76 } 77 78 static uint64_t cpu_pwrdwn_req_handler(uint32_t id, uint32_t flags, 79 void *handle, void *cookie) 80 { 81 uint32_t cpu_id = plat_my_core_pos(); 82 83 VERBOSE("Powering down CPU %d\n", cpu_id); 84 85 /* Deactivate CPU power down SGI */ 86 plat_ic_end_of_interrupt(CPU_PWR_DOWN_REQ_INTR); 87 88 return (uint64_t) psci_cpu_off(); 89 } 90 91 /** 92 * raise_pwr_down_interrupt() - Callback function to raise SGI. 93 * @mpidr: MPIDR for the target CPU. 94 * 95 * Raise SGI interrupt to trigger the CPU power down sequence on all the 96 * online secondary cores. 97 */ 98 static void raise_pwr_down_interrupt(u_register_t mpidr) 99 { 100 plat_ic_raise_el3_sgi((int)CPU_PWR_DOWN_REQ_INTR, mpidr); 101 } 102 103 void request_cpu_pwrdwn(void) 104 { 105 int ret; 106 107 VERBOSE("CPU power down request received\n"); 108 109 /* Send powerdown request to online secondary core(s) */ 110 ret = psci_stop_other_cores(plat_my_core_pos(), (unsigned int)PWRDWN_WAIT_TIMEOUT, raise_pwr_down_interrupt); 111 if (ret != (int)PSCI_E_SUCCESS) { 112 ERROR("Failed to powerdown secondary core(s)\n"); 113 } 114 115 /* Clear IPI IRQ */ 116 pm_ipi_irq_clear(primary_proc); 117 118 /* Deactivate IPI IRQ */ 119 plat_ic_end_of_interrupt(PLAT_VERSAL_IPI_IRQ); 120 } 121 122 static uint64_t ipi_fiq_handler(uint32_t id, uint32_t flags, void *handle, 123 void *cookie) 124 { 125 uint32_t payload[4] = {0}; 126 enum pm_ret_status ret; 127 uint32_t ipi_status, i; 128 129 VERBOSE("Received IPI FIQ from firmware\n"); 130 131 console_flush(); 132 (void)plat_ic_acknowledge_interrupt(); 133 134 /* Check status register for each IPI except PMC */ 135 for (i = IPI_ID_APU; i <= IPI_ID_5; i++) { 136 ipi_status = (uint32_t)ipi_mb_enquire_status(IPI_ID_APU, i); 137 138 /* If any agent other than PMC has generated IPI FIQ then send SGI to mbox driver */ 139 if ((ipi_status & (uint32_t)IPI_MB_STATUS_RECV_PENDING) > (uint32_t) 0) { 140 plat_ic_raise_ns_sgi((int)MBOX_SGI_SHARED_IPI, read_mpidr_el1()); 141 break; 142 } 143 } 144 145 /* If PMC has not generated interrupt then end ISR */ 146 ipi_status = (uint32_t)ipi_mb_enquire_status(IPI_ID_APU, IPI_ID_PMC); 147 if ((ipi_status & (uint32_t) IPI_MB_STATUS_RECV_PENDING) == (uint32_t) 0) { 148 plat_ic_end_of_interrupt(id); 149 goto end; 150 } 151 152 /* Handle PMC case */ 153 ret = pm_get_callbackdata(payload, ARRAY_SIZE(payload), 0, 0); 154 if (ret != PM_RET_SUCCESS) { 155 payload[0] = (uint32_t) ret; 156 } 157 158 switch (payload[0]) { 159 case PM_INIT_SUSPEND_CB: 160 if (sgi != INVALID_SGI) { 161 notify_os(); 162 } 163 break; 164 case PM_NOTIFY_CB: 165 if (sgi != INVALID_SGI) { 166 if (payload[2] == EVENT_CPU_PWRDWN) { 167 if (pwrdwn_req_received) { 168 pwrdwn_req_received = false; 169 request_cpu_pwrdwn(); 170 (void)psci_cpu_off(); 171 break; 172 } else { 173 /* No action needed, added for MISRA 174 * complaince 175 */ 176 } 177 pwrdwn_req_received = true; 178 179 } else { 180 /* No action needed, added for MISRA 181 * complaince 182 */ 183 } 184 notify_os(); 185 } else if (payload[2] == EVENT_CPU_PWRDWN) { 186 request_cpu_pwrdwn(); 187 (void)psci_cpu_off(); 188 } else { 189 /* No action needed, added for MISRA 190 * complaince 191 */ 192 } 193 break; 194 case (uint32_t) PM_RET_ERROR_INVALID_CRC: 195 pm_ipi_irq_clear(primary_proc); 196 WARN("Invalid CRC in the payload\n"); 197 break; 198 199 default: 200 pm_ipi_irq_clear(primary_proc); 201 WARN("Invalid IPI payload\n"); 202 break; 203 } 204 205 /* Clear FIQ */ 206 plat_ic_end_of_interrupt(id); 207 208 end: 209 return 0; 210 } 211 212 /** 213 * pm_register_sgi() - PM register the IPI interrupt. 214 * @sgi_num: SGI number to be used for communication. 215 * @reset: Reset to invalid SGI when reset=1. 216 * 217 * Return: On success, the initialization function must return 0. 218 * Any other return value will cause the framework to ignore 219 * the service. 220 * 221 * Update the SGI number to be used. 222 * 223 */ 224 int32_t pm_register_sgi(uint32_t sgi_num, uint32_t reset) 225 { 226 int32_t ret; 227 228 if (reset == 1U) { 229 sgi = INVALID_SGI; 230 ret = 0; 231 goto end; 232 } 233 234 if (sgi != INVALID_SGI) { 235 ret = -EBUSY; 236 goto end; 237 } 238 239 if (sgi_num >= GICV3_MAX_SGI_TARGETS) { 240 ret = -EINVAL; 241 goto end; 242 } 243 244 sgi = (uint32_t)sgi_num; 245 ret = 0; 246 end: 247 return ret; 248 } 249 250 /** 251 * pm_setup() - PM service setup. 252 * 253 * Return: On success, the initialization function must return 0. 254 * Any other return value will cause the framework to ignore 255 * the service. 256 * 257 * Initialization functions for Versal power management for 258 * communicaton with PMC. 259 * 260 * Called from sip_svc_setup initialization function with the 261 * rt_svc_init signature. 262 * 263 */ 264 int32_t pm_setup(void) 265 { 266 int32_t ret = 0; 267 268 pm_ipi_init(primary_proc); 269 pm_up = true; 270 271 /* register SGI handler for CPU power down request */ 272 ret = request_intr_type_el3(CPU_PWR_DOWN_REQ_INTR, cpu_pwrdwn_req_handler); 273 if (ret != 0) { 274 WARN("BL31: registering SGI interrupt failed\n"); 275 } 276 277 /* 278 * Enable IPI IRQ 279 * assume the rich OS is OK to handle callback IRQs now. 280 * Even if we were wrong, it would not enable the IRQ in 281 * the GIC. 282 */ 283 pm_ipi_irq_enable(primary_proc); 284 285 ret = request_intr_type_el3(PLAT_VERSAL_IPI_IRQ, ipi_fiq_handler); 286 if (ret != 0) { 287 WARN("BL31: registering IPI interrupt failed\n"); 288 } 289 290 gicd_write_irouter(gicv3_driver_data->gicd_base, PLAT_VERSAL_IPI_IRQ, MODE); 291 292 /* Register for idle callback during force power down/restart */ 293 ret = (int32_t)pm_register_notifier(primary_proc->node_id, EVENT_CPU_PWRDWN, 294 0x0U, 0x1U, SECURE_FLAG); 295 if (ret != 0) { 296 WARN("BL31: registering idle callback for restart/force power down failed\n"); 297 } 298 299 return ret; 300 } 301 302 /** 303 * eemi_psci_debugfs_handler() - EEMI API invoked from PSCI. 304 * @api_id: identifier for the API being called. 305 * @pm_arg: pointer to the argument data for the API call. 306 * @handle: Pointer to caller's context structure. 307 * @security_flag: SECURE_FLAG or NON_SECURE_FLAG. 308 * 309 * These EEMI APIs performs CPU specific power management tasks. 310 * These EEMI APIs are invoked either from PSCI or from debugfs in kernel. 311 * These calls require CPU specific processing before sending IPI request to 312 * Platform Management Controller. For example enable/disable CPU specific 313 * interrupts. This requires separate handler for these calls and may not be 314 * handled using common eemi handler. 315 * 316 * Return: If EEMI API found then, uintptr_t type address, else 0. 317 * 318 */ 319 static uintptr_t eemi_psci_debugfs_handler(uint32_t api_id, uint32_t *pm_arg, 320 void *handle, uint32_t security_flag) 321 { 322 enum pm_ret_status ret; 323 324 switch (api_id) { 325 326 case (uint32_t)PM_SELF_SUSPEND: 327 ret = pm_self_suspend(pm_arg[0], pm_arg[1], pm_arg[2], 328 pm_arg[3], security_flag); 329 SMC_RET1(handle, (u_register_t)ret); 330 331 case (uint32_t)PM_FORCE_POWERDOWN: 332 ret = pm_force_powerdown(pm_arg[0], (uint8_t)pm_arg[1], security_flag); 333 SMC_RET1(handle, (u_register_t)ret); 334 335 case (uint32_t)PM_REQ_SUSPEND: 336 ret = pm_req_suspend(pm_arg[0], (uint8_t)pm_arg[1], pm_arg[2], 337 pm_arg[3], security_flag); 338 SMC_RET1(handle, (u_register_t)ret); 339 340 case (uint32_t)PM_ABORT_SUSPEND: 341 ret = pm_abort_suspend(pm_arg[0], security_flag); 342 SMC_RET1(handle, (u_register_t)ret); 343 344 case (uint32_t)PM_SYSTEM_SHUTDOWN: 345 ret = pm_system_shutdown(pm_arg[0], pm_arg[1], security_flag); 346 SMC_RET1(handle, (u_register_t)ret); 347 348 default: 349 return (uintptr_t)0; 350 } 351 } 352 353 /** 354 * TF_A_specific_handler() - SMC handler for TF-A specific functionality. 355 * @api_id: identifier for the API being called. 356 * @pm_arg: pointer to the argument data for the API call. 357 * @handle: Pointer to caller's context structure. 358 * @security_flag: SECURE_FLAG or NON_SECURE_FLAG. 359 * 360 * These EEMI calls performs functionality that does not require 361 * IPI transaction. The handler ends in TF-A and returns requested data to 362 * kernel from TF-A. 363 * 364 * Return: If TF-A specific API found then, uintptr_t type address, else 0 365 * 366 */ 367 static uintptr_t TF_A_specific_handler(uint32_t api_id, uint32_t *pm_arg, 368 void *handle, uint32_t security_flag) 369 { 370 switch (api_id) { 371 372 case TF_A_FEATURE_CHECK: 373 { 374 enum pm_ret_status ret; 375 uint32_t result[PAYLOAD_ARG_CNT] = {0U}; 376 377 ret = eemi_feature_check(pm_arg[0], result); 378 SMC_RET1(handle, (uint64_t)ret | ((uint64_t)result[0] << 32U)); 379 } 380 381 case TF_A_PM_REGISTER_SGI: 382 { 383 int32_t ret; 384 385 ret = pm_register_sgi(pm_arg[0], pm_arg[1]); 386 if (ret != 0) { 387 SMC_RET1(handle, (uint32_t)PM_RET_ERROR_ARGS); 388 } 389 390 SMC_RET1(handle, (uint32_t)PM_RET_SUCCESS); 391 } 392 393 case PM_GET_CALLBACK_DATA: 394 { 395 uint32_t result[4] = {0}; 396 enum pm_ret_status ret; 397 398 ret = pm_get_callbackdata(result, ARRAY_SIZE(result), security_flag, 1U); 399 if (ret != PM_RET_SUCCESS) { 400 result[0] = (uint32_t) ret; 401 } 402 403 SMC_RET2(handle, 404 (uint64_t)result[0] | ((uint64_t)result[1] << 32U), 405 (uint64_t)result[2] | ((uint64_t)result[3] << 32U)); 406 } 407 408 case PM_GET_TRUSTZONE_VERSION: 409 SMC_RET1(handle, ((uint64_t)PM_RET_SUCCESS) | 410 (((uint64_t)TZ_VERSION) << 32U)); 411 412 default: 413 return (uintptr_t)0U; 414 } 415 } 416 417 /** 418 * eemi_api_handler() - Prepare EEMI payload and perform IPI transaction. 419 * @api_id: identifier for the API being called. 420 * @pm_arg: pointer to the argument data for the API call. 421 * @handle: Pointer to caller's context structure. 422 * @security_flag: SECURE_FLAG or NON_SECURE_FLAG. 423 * 424 * EEMI - Embedded Energy Management Interface is AMD-Xilinx proprietary 425 * protocol to allow communication between power management controller and 426 * different processing clusters. 427 * 428 * This handler prepares EEMI protocol payload received from kernel and performs 429 * IPI transaction. 430 * 431 * Return: If EEMI API found then, uintptr_t type address, else 0 432 */ 433 static uintptr_t eemi_api_handler(uint32_t api_id, const uint32_t *pm_arg, 434 void *handle, uint32_t security_flag) 435 { 436 enum pm_ret_status ret; 437 uint32_t buf[RET_PAYLOAD_ARG_CNT] = {0U}; 438 uint32_t payload[PAYLOAD_ARG_CNT] = {0U}; 439 uint32_t module_id; 440 441 module_id = (api_id & MODULE_ID_MASK) >> 8U; 442 443 PM_PACK_PAYLOAD7(payload, module_id, security_flag, api_id, 444 pm_arg[0], pm_arg[1], pm_arg[2], pm_arg[3], 445 pm_arg[4], pm_arg[5]); 446 447 ret = pm_ipi_send_sync(primary_proc, payload, (uint32_t *)buf, 448 RET_PAYLOAD_ARG_CNT); 449 450 SMC_RET4(handle, (uint64_t)ret | ((uint64_t)buf[0] << 32U), 451 (uint64_t)buf[1] | ((uint64_t)buf[2] << 32U), 452 (uint64_t)buf[3] | ((uint64_t)buf[4] << 32U), 453 (uint64_t)buf[5]); 454 } 455 456 /** 457 * pm_smc_handler() - SMC handler for PM-API calls coming from EL1/EL2. 458 * @smc_fid: Function Identifier. 459 * @x1: SMC64 Arguments from kernel. 460 * @x2: SMC64 Arguments from kernel. 461 * @x3: SMC64 Arguments from kernel (upper 32-bits). 462 * @x4: Unused. 463 * @cookie: Unused. 464 * @handle: Pointer to caller's context structure. 465 * @flags: SECURE_FLAG or NON_SECURE_FLAG. 466 * 467 * Return: Unused. 468 * 469 * Determines that smc_fid is valid and supported PM SMC Function ID from the 470 * list of pm_api_ids, otherwise completes the request with 471 * the unknown SMC Function ID. 472 * 473 * The SMC calls for PM service are forwarded from SIP Service SMC handler 474 * function with rt_svc_handle signature. 475 * 476 */ 477 uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, 478 uint64_t x4, const void *cookie, void *handle, uint64_t flags) 479 { 480 uintptr_t ret; 481 uint32_t pm_arg[PAYLOAD_ARG_CNT] = {0}; 482 uint32_t security_flag = NON_SECURE_FLAG; 483 uint32_t api_id; 484 bool status = false, status_tmp = false; 485 uint64_t x[4] = {x1, x2, x3, x4}; 486 487 /* Handle case where PM wasn't initialized properly */ 488 if (pm_up == false) { 489 SMC_RET1(handle, SMC_UNK); 490 } 491 492 /* 493 * Mark BIT24 payload (i.e 1st bit of pm_arg[3] ) as secure (0) 494 * if smc called is secure 495 * 496 * Add redundant macro call to immune the code from glitches 497 */ 498 SECURE_REDUNDANT_CALL(status, status_tmp, is_caller_secure, flags); 499 if ((status != false) && (status_tmp != false)) { 500 security_flag = SECURE_FLAG; 501 } 502 503 if ((smc_fid & FUNCID_NUM_MASK) == PASS_THROUGH_FW_CMD_ID) { 504 api_id = lower_32_bits(x[0]); 505 506 EXTRACT_ARGS(pm_arg, x); 507 508 return eemi_api_handler(api_id, pm_arg, handle, security_flag); 509 } 510 511 pm_arg[0] = (uint32_t)x1; 512 pm_arg[1] = (uint32_t)(x1 >> 32U); 513 pm_arg[2] = (uint32_t)x2; 514 pm_arg[3] = (uint32_t)(x2 >> 32U); 515 pm_arg[4] = (uint32_t)x3; 516 (void)(x4); 517 api_id = smc_fid & FUNCID_NUM_MASK; 518 519 ret = eemi_psci_debugfs_handler(api_id, pm_arg, handle, (uint32_t)flags); 520 if (ret != (uintptr_t)0) 521 goto error; 522 523 ret = TF_A_specific_handler(api_id, pm_arg, handle, security_flag); 524 if (ret != (uintptr_t)0) 525 goto error; 526 527 error: 528 return ret; 529 } 530