1c97857dbSAmit Nagal /* 2c97857dbSAmit Nagal * Copyright (c) 2018-2019, Arm Limited and Contributors. All rights reserved. 3c97857dbSAmit Nagal * Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved. 4*414cf08bSSenthil Nathan Thangaraj * Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved. 5c97857dbSAmit Nagal * 6c97857dbSAmit Nagal * SPDX-License-Identifier: BSD-3-Clause 7c97857dbSAmit Nagal */ 8c97857dbSAmit Nagal 9c97857dbSAmit Nagal #ifndef PLAT_PRIVATE_H 10c97857dbSAmit Nagal #define PLAT_PRIVATE_H 11c97857dbSAmit Nagal 12c97857dbSAmit Nagal #include <bl31/interrupt_mgmt.h> 13c97857dbSAmit Nagal #include <lib/xlat_tables/xlat_tables_v2.h> 14c97857dbSAmit Nagal 15c97857dbSAmit Nagal #define SPP_PSXC_MMI_V2_0 U(6) 16c97857dbSAmit Nagal #define SPP_PSXC_MMI_V3_0 U(8) 17c97857dbSAmit Nagal 18c97857dbSAmit Nagal /* MMD */ 19c97857dbSAmit Nagal #define SPP_PSXC_ISP_AIE_V2_0 U(3) 20c97857dbSAmit Nagal #define SPP_PSXC_MMD_AIE_FRZ_EA U(4) 21c97857dbSAmit Nagal #define SPP_PSXC_MMD_AIE_V3_0 U(5) 22c97857dbSAmit Nagal 23c97857dbSAmit Nagal typedef struct versal_intr_info_type_el3 { 24c97857dbSAmit Nagal uint32_t id; 25c97857dbSAmit Nagal interrupt_type_handler_t handler; 26c97857dbSAmit Nagal } versal_intr_info_type_el3_t; 27c97857dbSAmit Nagal 28c97857dbSAmit Nagal void config_setup(void); 29c97857dbSAmit Nagal uint32_t get_uart_clk(void); 30c97857dbSAmit Nagal 31c97857dbSAmit Nagal const mmap_region_t *plat_get_mmap(void); 32c97857dbSAmit Nagal 33c97857dbSAmit Nagal void plat_gic_driver_init(void); 34c97857dbSAmit Nagal void plat_gic_init(void); 35c97857dbSAmit Nagal void plat_gic_cpuif_enable(void); 36c97857dbSAmit Nagal void plat_gic_cpuif_disable(void); 37c97857dbSAmit Nagal void plat_gic_pcpu_init(void); 38c97857dbSAmit Nagal void plat_gic_save(void); 39c97857dbSAmit Nagal void plat_gic_resume(void); 40c97857dbSAmit Nagal void plat_gic_redistif_on(void); 41c97857dbSAmit Nagal void plat_gic_redistif_off(void); 42c97857dbSAmit Nagal 43c97857dbSAmit Nagal extern uint32_t cpu_clock, platform_id, platform_version; 444003ac02SSaivardhan Thatikonda extern uint32_t rtlversion, psversion, pmcversion; 45c97857dbSAmit Nagal void board_detection(void); 46c97857dbSAmit Nagal const char *board_name_decode(void); 47c97857dbSAmit Nagal uint64_t smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, 48*414cf08bSSenthil Nathan Thangaraj uint64_t x4, const void *cookie, void *handle, uint64_t flags); 49c97857dbSAmit Nagal int32_t sip_svc_setup_init(void); 50c97857dbSAmit Nagal /* 51c97857dbSAmit Nagal * Register handler to specific GIC entrance 52c97857dbSAmit Nagal * for INTR_TYPE_EL3 type of interrupt 53c97857dbSAmit Nagal */ 54c97857dbSAmit Nagal int request_intr_type_el3(uint32_t irq, interrupt_type_handler_t fiq_handler); 55c97857dbSAmit Nagal 56c97857dbSAmit Nagal #endif /* PLAT_PRIVATE_H */ 57