xref: /rk3399_ARM-atf/plat/amd/common/plat_fdt.c (revision e7dd086f3c0ec3bdfc006064a18b6b25cfe5de15)
1ea453871SMaheedhar Bollapalli /*
2ea453871SMaheedhar Bollapalli  * Copyright (c) 2025, Advanced Micro Devices, Inc. All rights reserved.
3ea453871SMaheedhar Bollapalli  *
4ea453871SMaheedhar Bollapalli  * SPDX-License-Identifier: BSD-3-Clause
5ea453871SMaheedhar Bollapalli  */
6ea453871SMaheedhar Bollapalli #include <common/debug.h>
7ea453871SMaheedhar Bollapalli #include <common/fdt_fixup.h>
8ea453871SMaheedhar Bollapalli #include <common/fdt_wrappers.h>
9ea453871SMaheedhar Bollapalli #include <libfdt.h>
10ea453871SMaheedhar Bollapalli #include <platform_def.h>
11ea453871SMaheedhar Bollapalli 
12ea453871SMaheedhar Bollapalli #include <plat_fdt.h>
13*e7dd086fSHarrison Mutai #ifdef TRANSFER_LIST
14ea453871SMaheedhar Bollapalli #include <plat_xfer_list.h>
15*e7dd086fSHarrison Mutai #endif
16ea453871SMaheedhar Bollapalli 
17ea453871SMaheedhar Bollapalli #define FIT_CONFS_PATH	"/configurations"
18ea453871SMaheedhar Bollapalli 
19ea453871SMaheedhar Bollapalli static bool is_fit_image(void *dtb)
20ea453871SMaheedhar Bollapalli {
21ea453871SMaheedhar Bollapalli 	int64_t confs_noffset = 0;
22ea453871SMaheedhar Bollapalli 	bool status = true;
23ea453871SMaheedhar Bollapalli 
24ea453871SMaheedhar Bollapalli 	confs_noffset = fdt_path_offset(dtb, FIT_CONFS_PATH);
25ea453871SMaheedhar Bollapalli 
26ea453871SMaheedhar Bollapalli 	/* confs_noffset is only present on FIT image */
27ea453871SMaheedhar Bollapalli 	if (confs_noffset < 0) {
28ea453871SMaheedhar Bollapalli 		status = false;
29ea453871SMaheedhar Bollapalli 	}
30ea453871SMaheedhar Bollapalli 
31ea453871SMaheedhar Bollapalli 	return status;
32ea453871SMaheedhar Bollapalli }
33ea453871SMaheedhar Bollapalli 
34ea453871SMaheedhar Bollapalli int32_t is_valid_dtb(void *fdt)
35ea453871SMaheedhar Bollapalli {
36ea453871SMaheedhar Bollapalli 	int32_t ret = 0;
37ea453871SMaheedhar Bollapalli 
38ea453871SMaheedhar Bollapalli 	ret = fdt_check_header(fdt);
39ea453871SMaheedhar Bollapalli 	if (ret != 0) {
40ea453871SMaheedhar Bollapalli 		ERROR("Can't read DT at %p\n", fdt);
41ea453871SMaheedhar Bollapalli 		goto error;
42ea453871SMaheedhar Bollapalli 	}
43ea453871SMaheedhar Bollapalli 
44ea453871SMaheedhar Bollapalli 	ret = fdt_open_into(fdt, fdt, XILINX_OF_BOARD_DTB_MAX_SIZE);
45ea453871SMaheedhar Bollapalli 	if (ret < 0) {
46ea453871SMaheedhar Bollapalli 		ERROR("Invalid Device Tree at %p: error %d\n", fdt, ret);
47ea453871SMaheedhar Bollapalli 		goto error;
48ea453871SMaheedhar Bollapalli 	}
49ea453871SMaheedhar Bollapalli 
50ea453871SMaheedhar Bollapalli 	if (is_fit_image(fdt)) {
51ea453871SMaheedhar Bollapalli 		WARN("FIT image detected, TF-A will not update DTB for DDR address space\n");
52ea453871SMaheedhar Bollapalli 		ret = -FDT_ERR_NOTFOUND;
53ea453871SMaheedhar Bollapalli 	}
54ea453871SMaheedhar Bollapalli error:
55ea453871SMaheedhar Bollapalli 	return ret;
56ea453871SMaheedhar Bollapalli }
57ea453871SMaheedhar Bollapalli 
58ea453871SMaheedhar Bollapalli /* TODO: Reserve TFA memory in DT through custom TL entry */
59ea453871SMaheedhar Bollapalli void prepare_dtb(void)
60ea453871SMaheedhar Bollapalli {
61ea453871SMaheedhar Bollapalli 
62ea453871SMaheedhar Bollapalli }
63ea453871SMaheedhar Bollapalli 
64ea453871SMaheedhar Bollapalli uintptr_t plat_retrieve_dt_addr(void)
65ea453871SMaheedhar Bollapalli {
66ea453871SMaheedhar Bollapalli 	void *dtb = NULL;
67ea453871SMaheedhar Bollapalli 
68ea453871SMaheedhar Bollapalli 	dtb = transfer_list_retrieve_dt_address();
69ea453871SMaheedhar Bollapalli 	if (dtb == NULL) {
70ea453871SMaheedhar Bollapalli 		WARN("TL header or DT entry is invalid\n");
71ea453871SMaheedhar Bollapalli 	}
72ea453871SMaheedhar Bollapalli 
73ea453871SMaheedhar Bollapalli 	return (uintptr_t)dtb;
74ea453871SMaheedhar Bollapalli }
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