1*58032586SSamuel Holland /* 2*58032586SSamuel Holland * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3*58032586SSamuel Holland * 4*58032586SSamuel Holland * SPDX-License-Identifier: BSD-3-Clause 5*58032586SSamuel Holland */ 6*58032586SSamuel Holland 7*58032586SSamuel Holland #include <arch_helpers.h> 8*58032586SSamuel Holland #include <assert.h> 9*58032586SSamuel Holland #include <debug.h> 10*58032586SSamuel Holland #include <delay_timer.h> 11*58032586SSamuel Holland #include <mmio.h> 12*58032586SSamuel Holland #include <platform.h> 13*58032586SSamuel Holland #include <platform_def.h> 14*58032586SSamuel Holland #include <psci.h> 15*58032586SSamuel Holland #include <sunxi_mmap.h> 16*58032586SSamuel Holland 17*58032586SSamuel Holland #define SUNXI_WDOG0_CTRL_REG (SUNXI_WDOG_BASE + 0x0010) 18*58032586SSamuel Holland #define SUNXI_WDOG0_CFG_REG (SUNXI_WDOG_BASE + 0x0014) 19*58032586SSamuel Holland #define SUNXI_WDOG0_MODE_REG (SUNXI_WDOG_BASE + 0x0018) 20*58032586SSamuel Holland 21*58032586SSamuel Holland static void __dead2 sunxi_system_off(void) 22*58032586SSamuel Holland { 23*58032586SSamuel Holland ERROR("PSCI: Full shutdown not implemented, halting\n"); 24*58032586SSamuel Holland wfi(); 25*58032586SSamuel Holland panic(); 26*58032586SSamuel Holland } 27*58032586SSamuel Holland 28*58032586SSamuel Holland static void __dead2 sunxi_system_reset(void) 29*58032586SSamuel Holland { 30*58032586SSamuel Holland /* Reset the whole system when the watchdog times out */ 31*58032586SSamuel Holland mmio_write_32(SUNXI_WDOG0_CFG_REG, 1); 32*58032586SSamuel Holland /* Enable the watchdog with the shortest timeout (0.5 seconds) */ 33*58032586SSamuel Holland mmio_write_32(SUNXI_WDOG0_MODE_REG, (0 << 4) | 1); 34*58032586SSamuel Holland /* Wait for twice the watchdog timeout before panicking */ 35*58032586SSamuel Holland mdelay(1000); 36*58032586SSamuel Holland 37*58032586SSamuel Holland ERROR("PSCI: System reset failed\n"); 38*58032586SSamuel Holland wfi(); 39*58032586SSamuel Holland panic(); 40*58032586SSamuel Holland } 41*58032586SSamuel Holland 42*58032586SSamuel Holland static plat_psci_ops_t sunxi_psci_ops = { 43*58032586SSamuel Holland .system_off = sunxi_system_off, 44*58032586SSamuel Holland .system_reset = sunxi_system_reset, 45*58032586SSamuel Holland }; 46*58032586SSamuel Holland 47*58032586SSamuel Holland int plat_setup_psci_ops(uintptr_t sec_entrypoint, 48*58032586SSamuel Holland const plat_psci_ops_t **psci_ops) 49*58032586SSamuel Holland { 50*58032586SSamuel Holland assert(psci_ops); 51*58032586SSamuel Holland 52*58032586SSamuel Holland *psci_ops = &sunxi_psci_ops; 53*58032586SSamuel Holland 54*58032586SSamuel Holland return 0; 55*58032586SSamuel Holland } 56