xref: /rk3399_ARM-atf/plat/allwinner/common/sunxi_pm.c (revision 333d66cf4e35f37f38135d15ef96ca2886b6f676)
158032586SSamuel Holland /*
258032586SSamuel Holland  * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
358032586SSamuel Holland  *
458032586SSamuel Holland  * SPDX-License-Identifier: BSD-3-Clause
558032586SSamuel Holland  */
658032586SSamuel Holland 
758032586SSamuel Holland #include <arch_helpers.h>
858032586SSamuel Holland #include <assert.h>
958032586SSamuel Holland #include <debug.h>
1058032586SSamuel Holland #include <delay_timer.h>
1158032586SSamuel Holland #include <mmio.h>
1258032586SSamuel Holland #include <platform.h>
1358032586SSamuel Holland #include <platform_def.h>
1458032586SSamuel Holland #include <psci.h>
1558032586SSamuel Holland #include <sunxi_mmap.h>
1658032586SSamuel Holland 
1758032586SSamuel Holland #define SUNXI_WDOG0_CTRL_REG		(SUNXI_WDOG_BASE + 0x0010)
1858032586SSamuel Holland #define SUNXI_WDOG0_CFG_REG		(SUNXI_WDOG_BASE + 0x0014)
1958032586SSamuel Holland #define SUNXI_WDOG0_MODE_REG		(SUNXI_WDOG_BASE + 0x0018)
2058032586SSamuel Holland 
21*333d66cfSSamuel Holland #include "sunxi_private.h"
22*333d66cfSSamuel Holland 
2358032586SSamuel Holland static void __dead2 sunxi_system_off(void)
2458032586SSamuel Holland {
25*333d66cfSSamuel Holland 	/* Turn off all secondary CPUs */
26*333d66cfSSamuel Holland 	sunxi_disable_secondary_cpus(plat_my_core_pos());
27*333d66cfSSamuel Holland 
2858032586SSamuel Holland 	ERROR("PSCI: Full shutdown not implemented, halting\n");
2958032586SSamuel Holland 	wfi();
3058032586SSamuel Holland 	panic();
3158032586SSamuel Holland }
3258032586SSamuel Holland 
3358032586SSamuel Holland static void __dead2 sunxi_system_reset(void)
3458032586SSamuel Holland {
3558032586SSamuel Holland 	/* Reset the whole system when the watchdog times out */
3658032586SSamuel Holland 	mmio_write_32(SUNXI_WDOG0_CFG_REG, 1);
3758032586SSamuel Holland 	/* Enable the watchdog with the shortest timeout (0.5 seconds) */
3858032586SSamuel Holland 	mmio_write_32(SUNXI_WDOG0_MODE_REG, (0 << 4) | 1);
3958032586SSamuel Holland 	/* Wait for twice the watchdog timeout before panicking */
4058032586SSamuel Holland 	mdelay(1000);
4158032586SSamuel Holland 
4258032586SSamuel Holland 	ERROR("PSCI: System reset failed\n");
4358032586SSamuel Holland 	wfi();
4458032586SSamuel Holland 	panic();
4558032586SSamuel Holland }
4658032586SSamuel Holland 
4758032586SSamuel Holland static plat_psci_ops_t sunxi_psci_ops = {
4858032586SSamuel Holland 	.system_off			= sunxi_system_off,
4958032586SSamuel Holland 	.system_reset			= sunxi_system_reset,
5058032586SSamuel Holland };
5158032586SSamuel Holland 
5258032586SSamuel Holland int plat_setup_psci_ops(uintptr_t sec_entrypoint,
5358032586SSamuel Holland 			const plat_psci_ops_t **psci_ops)
5458032586SSamuel Holland {
5558032586SSamuel Holland 	assert(psci_ops);
5658032586SSamuel Holland 
5758032586SSamuel Holland 	*psci_ops = &sunxi_psci_ops;
5858032586SSamuel Holland 
5958032586SSamuel Holland 	return 0;
6058032586SSamuel Holland }
61