1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <platform.h> 8 #include <platform_def.h> 9 #include <sunxi_def.h> 10 #include <xlat_tables_v2.h> 11 12 static mmap_region_t sunxi_mmap[PLATFORM_MMAP_REGIONS + 1] = { 13 MAP_REGION_FLAT(SUNXI_ROM_BASE, SUNXI_ROM_SIZE, 14 MT_MEMORY | MT_RO | MT_SECURE), 15 MAP_REGION_FLAT(SUNXI_SRAM_BASE, SUNXI_SRAM_SIZE, 16 MT_MEMORY | MT_RW | MT_SECURE), 17 MAP_REGION_FLAT(SUNXI_DEV_BASE, SUNXI_DEV_SIZE, 18 MT_DEVICE | MT_RW | MT_SECURE), 19 MAP_REGION_FLAT(SUNXI_DRAM_BASE, SUNXI_DRAM_SIZE, 20 MT_MEMORY | MT_RW | MT_NS), 21 {}, 22 }; 23 24 unsigned int plat_get_syscnt_freq2(void) 25 { 26 return SUNXI_OSC24M_CLK_IN_HZ; 27 } 28 29 uintptr_t plat_get_ns_image_entrypoint(void) 30 { 31 #ifdef PRELOADED_BL33_BASE 32 return PRELOADED_BL33_BASE; 33 #else 34 return PLAT_SUNXI_NS_IMAGE_OFFSET; 35 #endif 36 } 37 38 void sunxi_configure_mmu_el3(int flags) 39 { 40 mmap_add_region(BL31_BASE, BL31_BASE, 41 BL31_LIMIT - BL31_BASE, 42 MT_MEMORY | MT_RW | MT_SECURE); 43 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, 44 BL_CODE_END - BL_CODE_BASE, 45 MT_CODE | MT_SECURE); 46 mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE, 47 BL_RO_DATA_END - BL_RO_DATA_BASE, 48 MT_RO_DATA | MT_SECURE); 49 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, 50 BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, 51 MT_DEVICE | MT_RW | MT_SECURE); 52 mmap_add(sunxi_mmap); 53 init_xlat_tables(); 54 55 enable_mmu_el3(0); 56 } 57