1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <platform.h> 8 #include <platform_def.h> 9 #include <sunxi_def.h> 10 #include <xlat_tables_v2.h> 11 12 #include "sunxi_private.h" 13 14 static mmap_region_t sunxi_mmap[PLATFORM_MMAP_REGIONS + 1] = { 15 MAP_REGION_FLAT(SUNXI_ROM_BASE, SUNXI_ROM_SIZE, 16 MT_MEMORY | MT_RO | MT_SECURE), 17 MAP_REGION_FLAT(SUNXI_SRAM_BASE, SUNXI_SRAM_SIZE, 18 MT_MEMORY | MT_RW | MT_SECURE), 19 MAP_REGION_FLAT(SUNXI_DEV_BASE, SUNXI_DEV_SIZE, 20 MT_DEVICE | MT_RW | MT_SECURE), 21 MAP_REGION_FLAT(SUNXI_DRAM_BASE, SUNXI_DRAM_SIZE, 22 MT_MEMORY | MT_RW | MT_NS), 23 {}, 24 }; 25 26 unsigned int plat_get_syscnt_freq2(void) 27 { 28 return SUNXI_OSC24M_CLK_IN_HZ; 29 } 30 31 uintptr_t plat_get_ns_image_entrypoint(void) 32 { 33 #ifdef PRELOADED_BL33_BASE 34 return PRELOADED_BL33_BASE; 35 #else 36 return PLAT_SUNXI_NS_IMAGE_OFFSET; 37 #endif 38 } 39 40 void sunxi_configure_mmu_el3(int flags) 41 { 42 mmap_add_region(BL31_BASE, BL31_BASE, 43 BL31_LIMIT - BL31_BASE, 44 MT_MEMORY | MT_RW | MT_SECURE); 45 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, 46 BL_CODE_END - BL_CODE_BASE, 47 MT_CODE | MT_SECURE); 48 mmap_add_region(BL_RO_DATA_BASE, BL_RO_DATA_BASE, 49 BL_RO_DATA_END - BL_RO_DATA_BASE, 50 MT_RO_DATA | MT_SECURE); 51 mmap_add_region(BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_BASE, 52 BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, 53 MT_DEVICE | MT_RW | MT_SECURE); 54 mmap_add(sunxi_mmap); 55 init_xlat_tables(); 56 57 enable_mmu_el3(0); 58 } 59