1# 2# Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are met: 6# 7# Redistributions of source code must retain the above copyright notice, this 8# list of conditions and the following disclaimer. 9# 10# Redistributions in binary form must reproduce the above copyright notice, 11# this list of conditions and the following disclaimer in the documentation 12# and/or other materials provided with the distribution. 13# 14# Neither the name of ARM nor the names of its contributors may be used 15# to endorse or promote products derived from this software without specific 16# prior written permission. 17# 18# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21# ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22# LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23# CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24# SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25# INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26# CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27# ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28# POSSIBILITY OF SUCH DAMAGE. 29# 30 31# Default, static values for build variables, listed in alphabetic order. 32# Dependencies between build options, if any, are handled in the top-level 33# Makefile, after this file is included. This ensures that the former is better 34# poised to handle dependencies, as all build variables would have a default 35# value by then. 36 37# The AArch32 Secure Payload to be built as BL32 image 38AARCH32_SP := none 39 40# The Target build architecture. Supported values are: aarch64, aarch32. 41ARCH := aarch64 42 43# Determine the version of ARM CCI product used in the platform. The platform 44# port can change this value if needed. 45ARM_CCI_PRODUCT_ID := 400 46 47# ARM Architecture major and minor versions: 8.0 by default. 48ARM_ARCH_MAJOR := 8 49ARM_ARCH_MINOR := 0 50 51# Determine the version of ARM GIC architecture to use for interrupt management 52# in EL3. The platform port can change this value if needed. 53ARM_GIC_ARCH := 2 54 55# Flag used to indicate if ASM_ASSERTION should be enabled for the build. 56ASM_ASSERTION := 0 57 58# Base commit to perform code check on 59BASE_COMMIT := origin/master 60 61# By default, consider that the platform may release several CPUs out of reset. 62# The platform Makefile is free to override this value. 63COLD_BOOT_SINGLE_CPU := 0 64 65# For Chain of Trust 66CREATE_KEYS := 1 67 68# Build flag to include AArch32 registers in cpu context save and restore during 69# world switch. This flag must be set to 0 for AArch64-only platforms. 70CTX_INCLUDE_AARCH32_REGS := 1 71 72# Include FP registers in cpu context 73CTX_INCLUDE_FPREGS := 0 74 75# Debug build 76DEBUG := 0 77 78# Build platform 79DEFAULT_PLAT := fvp 80 81# By default, use the -pedantic option in the gcc command line 82DISABLE_PEDANTIC := 0 83 84# Flag to enable Performance Measurement Framework 85ENABLE_PMF := 0 86 87# Flag to enable PSCI STATs functionality 88ENABLE_PSCI_STAT := 0 89 90# Flag to enable runtime instrumentation using PMF 91ENABLE_RUNTIME_INSTRUMENTATION := 0 92 93# Build flag to treat usage of deprecated platform and framework APIs as error. 94ERROR_DEPRECATED := 0 95 96# Byte alignment that each component in FIP is aligned to 97FIP_ALIGN := 0 98 99# Default FIP file name 100FIP_NAME := fip.bin 101 102# Default FWU_FIP file name 103FWU_FIP_NAME := fwu_fip.bin 104 105# For Chain of Trust 106GENERATE_COT := 0 107 108# Flag to enable new version of image loading 109LOAD_IMAGE_V2 := 0 110 111# NS timer register save and restore 112NS_TIMER_SWITCH := 0 113 114# Build PL011 UART driver in minimal generic UART mode 115PL011_GENERIC_UART := 0 116 117# By default, consider that the platform's reset address is not programmable. 118# The platform Makefile is free to override this value. 119PROGRAMMABLE_RESET_ADDRESS := 0 120 121# Flag used to choose the power state format viz Extended State-ID or the 122# Original format. 123PSCI_EXTENDED_STATE_ID := 0 124 125# By default, BL1 acts as the reset handler, not BL31 126RESET_TO_BL31 := 0 127 128# For Chain of Trust 129SAVE_KEYS := 0 130 131# Whether code and read-only data should be put on separate memory pages. The 132# platform Makefile is free to override this value. 133SEPARATE_CODE_AND_RODATA := 0 134 135# SPD choice 136SPD := none 137 138# Flag to introduce an infinite loop in BL1 just before it exits into the next 139# image. This is meant to help debugging the post-BL2 phase. 140SPIN_ON_BL1_EXIT := 0 141 142# Flags to build TF with Trusted Boot support 143TRUSTED_BOARD_BOOT := 0 144 145# Build option to choose whether Trusted firmware uses Coherent memory or not. 146USE_COHERENT_MEM := 1 147 148# Build verbosity 149V := 0 150