1# 2# Copyright (c) 2016-2020, ARM Limited. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Default, static values for build variables, listed in alphabetic order. 8# Dependencies between build options, if any, are handled in the top-level 9# Makefile, after this file is included. This ensures that the former is better 10# poised to handle dependencies, as all build variables would have a default 11# value by then. 12 13# Use T32 by default 14AARCH32_INSTRUCTION_SET := T32 15 16# The AArch32 Secure Payload to be built as BL32 image 17AARCH32_SP := none 18 19# The Target build architecture. Supported values are: aarch64, aarch32. 20ARCH := aarch64 21 22# ARM Architecture feature modifiers: none by default 23ARM_ARCH_FEATURE := none 24 25# ARM Architecture major and minor versions: 8.0 by default. 26ARM_ARCH_MAJOR := 8 27ARM_ARCH_MINOR := 0 28 29# Base commit to perform code check on 30BASE_COMMIT := origin/master 31 32# Execute BL2 at EL3 33BL2_AT_EL3 := 0 34 35# BL2 image is stored in XIP memory, for now, this option is only supported 36# when BL2_AT_EL3 is 1. 37BL2_IN_XIP_MEM := 0 38 39# Do dcache invalidate upon BL2 entry at EL3 40BL2_INV_DCACHE := 1 41 42# Select the branch protection features to use. 43BRANCH_PROTECTION := 0 44 45# By default, consider that the platform may release several CPUs out of reset. 46# The platform Makefile is free to override this value. 47COLD_BOOT_SINGLE_CPU := 0 48 49# Flag to compile in coreboot support code. Exclude by default. The coreboot 50# Makefile system will set this when compiling TF as part of a coreboot image. 51COREBOOT := 0 52 53# For Chain of Trust 54CREATE_KEYS := 1 55 56# Build flag to include AArch32 registers in cpu context save and restore during 57# world switch. This flag must be set to 0 for AArch64-only platforms. 58CTX_INCLUDE_AARCH32_REGS := 1 59 60# Include FP registers in cpu context 61CTX_INCLUDE_FPREGS := 0 62 63# Include pointer authentication (ARMv8.3-PAuth) registers in cpu context. This 64# must be set to 1 if the platform wants to use this feature in the Secure 65# world. It is not needed to use it in the Non-secure world. 66CTX_INCLUDE_PAUTH_REGS := 0 67 68# Include Nested virtualization control (Armv8.4-NV) registers in cpu context. 69# This must be set to 1 if architecture implements Nested Virtualization 70# Extension and platform wants to use this feature in the Secure world 71CTX_INCLUDE_NEVE_REGS := 0 72 73# Debug build 74DEBUG := 0 75 76# By default disable authenticated decryption support. 77DECRYPTION_SUPPORT := none 78 79# Build platform 80DEFAULT_PLAT := fvp 81 82# Disable the generation of the binary image (ELF only). 83DISABLE_BIN_GENERATION := 0 84 85# Enable capability to disable authentication dynamically. Only meant for 86# development platforms. 87DYN_DISABLE_AUTH := 0 88 89# Build option to enable MPAM for lower ELs 90ENABLE_MPAM_FOR_LOWER_ELS := 0 91 92# Flag to Enable Position Independant support (PIE) 93ENABLE_PIE := 0 94 95# Flag to enable Performance Measurement Framework 96ENABLE_PMF := 0 97 98# Flag to enable PSCI STATs functionality 99ENABLE_PSCI_STAT := 0 100 101# Flag to enable runtime instrumentation using PMF 102ENABLE_RUNTIME_INSTRUMENTATION := 0 103 104# Flag to enable stack corruption protection 105ENABLE_STACK_PROTECTOR := 0 106 107# Flag to enable exception handling in EL3 108EL3_EXCEPTION_HANDLING := 0 109 110# Flag to enable Branch Target Identification. 111# Internal flag not meant for direct setting. 112# Use BRANCH_PROTECTION to enable BTI. 113ENABLE_BTI := 0 114 115# Flag to enable Pointer Authentication. 116# Internal flag not meant for direct setting. 117# Use BRANCH_PROTECTION to enable PAUTH. 118ENABLE_PAUTH := 0 119 120# By default BL31 encryption disabled 121ENCRYPT_BL31 := 0 122 123# By default BL32 encryption disabled 124ENCRYPT_BL32 := 0 125 126# Default dummy firmware encryption key 127ENC_KEY := 1234567890abcdef1234567890abcdef1234567890abcdef1234567890abcdef 128 129# Default dummy nonce for firmware encryption 130ENC_NONCE := 1234567890abcdef12345678 131 132# Build flag to treat usage of deprecated platform and framework APIs as error. 133ERROR_DEPRECATED := 0 134 135# Fault injection support 136FAULT_INJECTION_SUPPORT := 0 137 138# Byte alignment that each component in FIP is aligned to 139FIP_ALIGN := 0 140 141# Default FIP file name 142FIP_NAME := fip.bin 143 144# Default FWU_FIP file name 145FWU_FIP_NAME := fwu_fip.bin 146 147# By default firmware encryption with SSK 148FW_ENC_STATUS := 0 149 150# For Chain of Trust 151GENERATE_COT := 0 152 153# Hint platform interrupt control layer that Group 0 interrupts are for EL3. By 154# default, they are for Secure EL1. 155GICV2_G0_FOR_EL3 := 0 156 157# Route External Aborts to EL3. Disabled by default; External Aborts are handled 158# by lower ELs. 159HANDLE_EA_EL3_FIRST := 0 160 161# Secure hash algorithm flag, accepts 3 values: sha256, sha384 and sha512. 162# The default value is sha256. 163HASH_ALG := sha256 164 165# Whether system coherency is managed in hardware, without explicit software 166# operations. 167HW_ASSISTED_COHERENCY := 0 168 169# Set the default algorithm for the generation of Trusted Board Boot keys 170KEY_ALG := rsa 171 172# Set the default key size in case KEY_ALG is rsa 173ifeq ($(KEY_ALG),rsa) 174KEY_SIZE := 2048 175endif 176 177# Option to build TF with Measured Boot support 178MEASURED_BOOT := 0 179 180# NS timer register save and restore 181NS_TIMER_SWITCH := 0 182 183# Include lib/libc in the final image 184OVERRIDE_LIBC := 0 185 186# Build PL011 UART driver in minimal generic UART mode 187PL011_GENERIC_UART := 0 188 189# By default, consider that the platform's reset address is not programmable. 190# The platform Makefile is free to override this value. 191PROGRAMMABLE_RESET_ADDRESS := 0 192 193# Flag used to choose the power state format: Extended State-ID or Original 194PSCI_EXTENDED_STATE_ID := 0 195 196# Enable RAS support 197RAS_EXTENSION := 0 198 199# By default, BL1 acts as the reset handler, not BL31 200RESET_TO_BL31 := 0 201 202# For Chain of Trust 203SAVE_KEYS := 0 204 205# Software Delegated Exception support 206SDEI_SUPPORT := 0 207 208# Whether code and read-only data should be put on separate memory pages. The 209# platform Makefile is free to override this value. 210SEPARATE_CODE_AND_RODATA := 0 211 212# Put NOBITS sections (.bss, stacks, page tables, and coherent memory) in a 213# separate memory region, which may be discontiguous from the rest of BL31. 214SEPARATE_NOBITS_REGION := 0 215 216# If the BL31 image initialisation code is recalimed after use for the secondary 217# cores stack 218RECLAIM_INIT_CODE := 0 219 220# SPD choice 221SPD := none 222 223# Enable the Management Mode (MM)-based Secure Partition Manager implementation 224SPM_MM := 0 225 226# Use SPM at S-EL2 as a default config for SPMD 227SPMD_SPM_AT_SEL2 := 1 228 229# Flag to introduce an infinite loop in BL1 just before it exits into the next 230# image. This is meant to help debugging the post-BL2 phase. 231SPIN_ON_BL1_EXIT := 0 232 233# Flags to build TF with Trusted Boot support 234TRUSTED_BOARD_BOOT := 0 235 236# Build option to choose whether Trusted Firmware uses Coherent memory or not. 237USE_COHERENT_MEM := 1 238 239# Build option to add debugfs support 240USE_DEBUGFS := 0 241 242# Build option to fconf based io 243ARM_IO_IN_DTB := 0 244 245# Build option to support SDEI through fconf 246SDEI_IN_FCONF := 0 247 248# Build option to support Secure Interrupt descriptors through fconf 249SEC_INT_DESC_IN_FCONF := 0 250 251# Build option to choose whether Trusted Firmware uses library at ROM 252USE_ROMLIB := 0 253 254# Build option to choose whether the xlat tables of BL images can be read-only. 255# Note that this only serves as a higher level option to PLAT_RO_XLAT_TABLES, 256# which is the per BL-image option that actually enables the read-only tables 257# API. The reason for having this additional option is to have a common high 258# level makefile where we can check for incompatible features/build options. 259ALLOW_RO_XLAT_TABLES := 0 260 261# Chain of trust. 262COT := tbbr 263 264# Use tbbr_oid.h instead of platform_oid.h 265USE_TBBR_DEFS := 1 266 267# Build verbosity 268V := 0 269 270# Whether to enable D-Cache early during warm boot. This is usually 271# applicable for platforms wherein interconnect programming is not 272# required to enable cache coherency after warm reset (eg: single cluster 273# platforms). 274WARMBOOT_ENABLE_DCACHE_EARLY := 0 275 276# Build option to enable/disable the Statistical Profiling Extensions 277ENABLE_SPE_FOR_LOWER_ELS := 1 278 279# SPE is only supported on AArch64 so disable it on AArch32. 280ifeq (${ARCH},aarch32) 281 override ENABLE_SPE_FOR_LOWER_ELS := 0 282endif 283 284# Include Memory Tagging Extension registers in cpu context. This must be set 285# to 1 if the platform wants to use this feature in the Secure world and MTE is 286# enabled at ELX. 287CTX_INCLUDE_MTE_REGS := 0 288 289ENABLE_AMU := 0 290 291# By default, enable Scalable Vector Extension if implemented for Non-secure 292# lower ELs 293# Note SVE is only supported on AArch64 - therefore do not enable in AArch32 294ifneq (${ARCH},aarch32) 295 ENABLE_SVE_FOR_NS := 1 296else 297 override ENABLE_SVE_FOR_NS := 0 298endif 299 300SANITIZE_UB := off 301 302# For ARMv8.1 (AArch64) platforms, enabling this option selects the spinlock 303# implementation variant using the ARMv8.1-LSE compare-and-swap instruction. 304# Default: disabled 305USE_SPINLOCK_CAS := 0 306 307# Enable Link Time Optimization 308ENABLE_LTO := 0 309 310# Build flag to include EL2 registers in cpu context save and restore during 311# S-EL2 firmware entry/exit. This flag is to be used with SPD=spmd option. 312# Default is 0. 313CTX_INCLUDE_EL2_REGS := 0 314 315# Enable Memory tag extension which is supported for architecture greater 316# than Armv8.5-A 317# By default it is set to "no" 318SUPPORT_STACK_MEMTAG := no 319 320# Select workaround for AT speculative behaviour. 321ERRATA_SPECULATIVE_AT := 0 322 323# Trap RAS error record access from lower EL 324RAS_TRAP_LOWER_EL_ERR_ACCESS := 0 325 326# Build option to create cot descriptors using fconf 327COT_DESC_IN_DTB := 0 328 329# Build option to provide openssl directory path 330OPENSSL_DIR := /usr 331 332# Build option to use the SP804 timer instead of the generic one 333USE_SP804_TIMER := 0 334