xref: /rk3399_ARM-atf/make_helpers/defaults.mk (revision 2fccb228045696b98f83b1d865bac3c65d96b980)
12fae4b1eSJeenu Viswambharan#
2c877b414SJeenu Viswambharan# Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
32fae4b1eSJeenu Viswambharan#
482cb2c1aSdp-arm# SPDX-License-Identifier: BSD-3-Clause
52fae4b1eSJeenu Viswambharan#
62fae4b1eSJeenu Viswambharan
72fae4b1eSJeenu Viswambharan# Default, static values for build variables, listed in alphabetic order.
82fae4b1eSJeenu Viswambharan# Dependencies between build options, if any, are handled in the top-level
92fae4b1eSJeenu Viswambharan# Makefile, after this file is included. This ensures that the former is better
102fae4b1eSJeenu Viswambharan# poised to handle dependencies, as all build variables would have a default
112fae4b1eSJeenu Viswambharan# value by then.
122fae4b1eSJeenu Viswambharan
132fae4b1eSJeenu Viswambharan# The AArch32 Secure Payload to be built as BL32 image
142fae4b1eSJeenu ViswambharanAARCH32_SP			:= none
152fae4b1eSJeenu Viswambharan
162fae4b1eSJeenu Viswambharan# The Target build architecture. Supported values are: aarch64, aarch32.
172fae4b1eSJeenu ViswambharanARCH				:= aarch64
182fae4b1eSJeenu Viswambharan
19c877b414SJeenu Viswambharan# ARM Architecture major and minor versions: 8.0 by default.
20c877b414SJeenu ViswambharanARM_ARCH_MAJOR			:= 8
21c877b414SJeenu ViswambharanARM_ARCH_MINOR			:= 0
22c877b414SJeenu Viswambharan
232fae4b1eSJeenu Viswambharan# Determine the version of ARM GIC architecture to use for interrupt management
242fae4b1eSJeenu Viswambharan# in EL3. The platform port can change this value if needed.
252fae4b1eSJeenu ViswambharanARM_GIC_ARCH			:= 2
262fae4b1eSJeenu Viswambharan
272fae4b1eSJeenu Viswambharan# Flag used to indicate if ASM_ASSERTION should be enabled for the build.
282fae4b1eSJeenu ViswambharanASM_ASSERTION			:= 0
292fae4b1eSJeenu Viswambharan
302fae4b1eSJeenu Viswambharan# Base commit to perform code check on
312fae4b1eSJeenu ViswambharanBASE_COMMIT			:= origin/master
322fae4b1eSJeenu Viswambharan
332fae4b1eSJeenu Viswambharan# By default, consider that the platform may release several CPUs out of reset.
342fae4b1eSJeenu Viswambharan# The platform Makefile is free to override this value.
352fae4b1eSJeenu ViswambharanCOLD_BOOT_SINGLE_CPU		:= 0
362fae4b1eSJeenu Viswambharan
372fae4b1eSJeenu Viswambharan# For Chain of Trust
382fae4b1eSJeenu ViswambharanCREATE_KEYS			:= 1
392fae4b1eSJeenu Viswambharan
402fae4b1eSJeenu Viswambharan# Build flag to include AArch32 registers in cpu context save and restore during
412fae4b1eSJeenu Viswambharan# world switch. This flag must be set to 0 for AArch64-only platforms.
422fae4b1eSJeenu ViswambharanCTX_INCLUDE_AARCH32_REGS	:= 1
432fae4b1eSJeenu Viswambharan
442fae4b1eSJeenu Viswambharan# Include FP registers in cpu context
452fae4b1eSJeenu ViswambharanCTX_INCLUDE_FPREGS		:= 0
462fae4b1eSJeenu Viswambharan
472fae4b1eSJeenu Viswambharan# Debug build
482fae4b1eSJeenu ViswambharanDEBUG				:= 0
492fae4b1eSJeenu Viswambharan
502fae4b1eSJeenu Viswambharan# Build platform
512fae4b1eSJeenu ViswambharanDEFAULT_PLAT			:= fvp
522fae4b1eSJeenu Viswambharan
532fae4b1eSJeenu Viswambharan# Flag to enable Performance Measurement Framework
542fae4b1eSJeenu ViswambharanENABLE_PMF			:= 0
552fae4b1eSJeenu Viswambharan
562fae4b1eSJeenu Viswambharan# Flag to enable PSCI STATs functionality
572fae4b1eSJeenu ViswambharanENABLE_PSCI_STAT		:= 0
582fae4b1eSJeenu Viswambharan
592fae4b1eSJeenu Viswambharan# Flag to enable runtime instrumentation using PMF
602fae4b1eSJeenu ViswambharanENABLE_RUNTIME_INSTRUMENTATION	:= 0
612fae4b1eSJeenu Viswambharan
6251faada7SDouglas Raillard# Flag to enable stack corruption protection
6351faada7SDouglas RaillardENABLE_STACK_PROTECTOR		:= 0
6451faada7SDouglas Raillard
652fae4b1eSJeenu Viswambharan# Build flag to treat usage of deprecated platform and framework APIs as error.
662fae4b1eSJeenu ViswambharanERROR_DEPRECATED		:= 0
672fae4b1eSJeenu Viswambharan
681c75d5dfSMasahiro Yamada# Byte alignment that each component in FIP is aligned to
691c75d5dfSMasahiro YamadaFIP_ALIGN			:= 0
701c75d5dfSMasahiro Yamada
712fae4b1eSJeenu Viswambharan# Default FIP file name
722fae4b1eSJeenu ViswambharanFIP_NAME			:= fip.bin
732fae4b1eSJeenu Viswambharan
742fae4b1eSJeenu Viswambharan# Default FWU_FIP file name
752fae4b1eSJeenu ViswambharanFWU_FIP_NAME			:= fwu_fip.bin
762fae4b1eSJeenu Viswambharan
772fae4b1eSJeenu Viswambharan# For Chain of Trust
782fae4b1eSJeenu ViswambharanGENERATE_COT			:= 0
792fae4b1eSJeenu Viswambharan
8074dce7faSJeenu Viswambharan# Hint platform interrupt control layer that Group 0 interrupts are for EL3. By
8174dce7faSJeenu Viswambharan# default, they are for Secure EL1.
8274dce7faSJeenu ViswambharanGICV2_G0_FOR_EL3		:= 0
8374dce7faSJeenu Viswambharan
843c251af3SJeenu Viswambharan# Whether system coherency is managed in hardware, without explicit software
853c251af3SJeenu Viswambharan# operations.
863c251af3SJeenu ViswambharanHW_ASSISTED_COHERENCY		:= 0
873c251af3SJeenu Viswambharan
882091755cSSoby Mathew# Set the default algorithm for the generation of Trusted Board Boot keys
892091755cSSoby MathewKEY_ALG				:= rsa
902091755cSSoby Mathew
912fae4b1eSJeenu Viswambharan# Flag to enable new version of image loading
922fae4b1eSJeenu ViswambharanLOAD_IMAGE_V2			:= 0
932fae4b1eSJeenu Viswambharan
942fae4b1eSJeenu Viswambharan# NS timer register save and restore
952fae4b1eSJeenu ViswambharanNS_TIMER_SWITCH			:= 0
962fae4b1eSJeenu Viswambharan
972fae4b1eSJeenu Viswambharan# Build PL011 UART driver in minimal generic UART mode
982fae4b1eSJeenu ViswambharanPL011_GENERIC_UART		:= 0
992fae4b1eSJeenu Viswambharan
1002fae4b1eSJeenu Viswambharan# By default, consider that the platform's reset address is not programmable.
1012fae4b1eSJeenu Viswambharan# The platform Makefile is free to override this value.
1022fae4b1eSJeenu ViswambharanPROGRAMMABLE_RESET_ADDRESS	:= 0
1032fae4b1eSJeenu Viswambharan
1042fae4b1eSJeenu Viswambharan# Flag used to choose the power state format viz Extended State-ID or the
1052fae4b1eSJeenu Viswambharan# Original format.
1062fae4b1eSJeenu ViswambharanPSCI_EXTENDED_STATE_ID		:= 0
1072fae4b1eSJeenu Viswambharan
1082fae4b1eSJeenu Viswambharan# By default, BL1 acts as the reset handler, not BL31
1092fae4b1eSJeenu ViswambharanRESET_TO_BL31			:= 0
1102fae4b1eSJeenu Viswambharan
1112fae4b1eSJeenu Viswambharan# For Chain of Trust
1122fae4b1eSJeenu ViswambharanSAVE_KEYS			:= 0
1132fae4b1eSJeenu Viswambharan
1142fae4b1eSJeenu Viswambharan# Whether code and read-only data should be put on separate memory pages. The
1152fae4b1eSJeenu Viswambharan# platform Makefile is free to override this value.
1162fae4b1eSJeenu ViswambharanSEPARATE_CODE_AND_RODATA	:= 0
1172fae4b1eSJeenu Viswambharan
1182fae4b1eSJeenu Viswambharan# SPD choice
1192fae4b1eSJeenu ViswambharanSPD				:= none
1202fae4b1eSJeenu Viswambharan
121*2fccb228SAntonio Nino Diaz# For including the Secure Partition Manager
122*2fccb228SAntonio Nino DiazENABLE_SPM			:= 0
123*2fccb228SAntonio Nino Diaz
1242fae4b1eSJeenu Viswambharan# Flag to introduce an infinite loop in BL1 just before it exits into the next
1252fae4b1eSJeenu Viswambharan# image. This is meant to help debugging the post-BL2 phase.
1262fae4b1eSJeenu ViswambharanSPIN_ON_BL1_EXIT		:= 0
1272fae4b1eSJeenu Viswambharan
1282fae4b1eSJeenu Viswambharan# Flags to build TF with Trusted Boot support
1292fae4b1eSJeenu ViswambharanTRUSTED_BOARD_BOOT		:= 0
1302fae4b1eSJeenu Viswambharan
1312fae4b1eSJeenu Viswambharan# Build option to choose whether Trusted firmware uses Coherent memory or not.
1322fae4b1eSJeenu ViswambharanUSE_COHERENT_MEM		:= 1
1332fae4b1eSJeenu Viswambharan
134bb41eb7aSMasahiro Yamada# Use tbbr_oid.h instead of platform_oid.h
135bb41eb7aSMasahiro YamadaUSE_TBBR_DEFS			= $(ERROR_DEPRECATED)
136bb41eb7aSMasahiro Yamada
1372fae4b1eSJeenu Viswambharan# Build verbosity
1382fae4b1eSJeenu ViswambharanV				:= 0
139bcc3c49cSSoby Mathew
140bcc3c49cSSoby Mathew# Whether to enable D-Cache early during warm boot. This is usually
141bcc3c49cSSoby Mathew# applicable for platforms wherein interconnect programming is not
142bcc3c49cSSoby Mathew# required to enable cache coherency after warm reset (eg: single cluster
143bcc3c49cSSoby Mathew# platforms).
144bcc3c49cSSoby MathewWARMBOOT_ENABLE_DCACHE_EARLY	:= 0
145d832aee9Sdp-arm
146d832aee9Sdp-arm# By default, enable Statistical Profiling Extensions.
147d832aee9Sdp-arm# The top level Makefile will disable this feature depending on
148d832aee9Sdp-arm# the target architecture and version number.
149d832aee9Sdp-armENABLE_SPE_FOR_LOWER_ELS	:= 1
150d832aee9Sdp-arm
151d832aee9Sdp-arm# SPE is enabled by default but only supported on AArch64 8.2 onwards.
152d832aee9Sdp-arm# Disable it in all other cases.
153d832aee9Sdp-armifeq (${ARCH},aarch32)
154d832aee9Sdp-arm    override ENABLE_SPE_FOR_LOWER_ELS := 0
155d832aee9Sdp-armelse
156d832aee9Sdp-arm    ifeq (${ARM_ARCH_MAJOR},8)
157d832aee9Sdp-arm        ifeq ($(ARM_ARCH_MINOR),$(filter $(ARM_ARCH_MINOR),0 1))
158d832aee9Sdp-arm            ENABLE_SPE_FOR_LOWER_ELS := 0
159d832aee9Sdp-arm        endif
160d832aee9Sdp-arm    endif
161d832aee9Sdp-armendif
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