1*b14987cfSBoyan Karatotev# 2*b14987cfSBoyan Karatotev# Copyright (c) 2025, Arm Limited. All rights reserved. 3*b14987cfSBoyan Karatotev# 4*b14987cfSBoyan Karatotev# SPDX-License-Identifier: BSD-3-Clause 5*b14987cfSBoyan Karatotev# 6*b14987cfSBoyan Karatotev 7*b14987cfSBoyan Karatotevifneq ($(AARCH32_INSTRUCTION_SET),$(filter $(AARCH32_INSTRUCTION_SET),A32 T32)) 8*b14987cfSBoyan Karatotev $(error Error: Unknown AArch32 instruction set ${AARCH32_INSTRUCTION_SET}) 9*b14987cfSBoyan Karatotevendif 10*b14987cfSBoyan Karatotev 11*b14987cfSBoyan Karatotevifneq (${ENABLE_RME},0) 12*b14987cfSBoyan Karatotev ifneq (${ARCH},aarch64) 13*b14987cfSBoyan Karatotev $(error ENABLE_RME requires AArch64) 14*b14987cfSBoyan Karatotev endif 15*b14987cfSBoyan Karatotev ifeq ($(SPMC_AT_EL3),1) 16*b14987cfSBoyan Karatotev $(error SPMC_AT_EL3 and ENABLE_RME cannot both be enabled.) 17*b14987cfSBoyan Karatotev endif 18*b14987cfSBoyan Karatotev 19*b14987cfSBoyan Karatotev ifneq (${SPD}, none) 20*b14987cfSBoyan Karatotev ifneq (${SPD}, spmd) 21*b14987cfSBoyan Karatotev $(error ENABLE_RME is incompatible with SPD=${SPD}. Use SPD=spmd) 22*b14987cfSBoyan Karatotev endif 23*b14987cfSBoyan Karatotev endif 24*b14987cfSBoyan Karatotevendif 25*b14987cfSBoyan Karatotev 26*b14987cfSBoyan Karatotevifeq (${CTX_INCLUDE_EL2_REGS}, 1) 27*b14987cfSBoyan Karatotev ifeq (${SPD},none) 28*b14987cfSBoyan Karatotev ifeq (${ENABLE_RME},0) 29*b14987cfSBoyan Karatotev $(error CTX_INCLUDE_EL2_REGS is available only when SPD \ 30*b14987cfSBoyan Karatotev or RME is enabled) 31*b14987cfSBoyan Karatotev endif 32*b14987cfSBoyan Karatotev endif 33*b14987cfSBoyan Karatotevendif 34*b14987cfSBoyan Karatotev 35*b14987cfSBoyan Karatotev################################################################################ 36*b14987cfSBoyan Karatotev# Verify FEAT_RME, FEAT_SCTLR2 and FEAT_TCR2 are enabled if FEAT_MEC is enabled. 37*b14987cfSBoyan Karatotev################################################################################ 38*b14987cfSBoyan Karatotev 39*b14987cfSBoyan Karatotevifneq (${ENABLE_FEAT_MEC},0) 40*b14987cfSBoyan Karatotev ifeq (${ENABLE_RME},0) 41*b14987cfSBoyan Karatotev $(error FEAT_RME must be enabled when FEAT_MEC is enabled.) 42*b14987cfSBoyan Karatotev endif 43*b14987cfSBoyan Karatotev ifeq (${ENABLE_FEAT_TCR2},0) 44*b14987cfSBoyan Karatotev $(error FEAT_TCR2 must be enabled when FEAT_MEC is enabled.) 45*b14987cfSBoyan Karatotev endif 46*b14987cfSBoyan Karatotev ifeq (${ENABLE_FEAT_SCTLR2},0) 47*b14987cfSBoyan Karatotev $(error FEAT_SCTLR2 must be enabled when FEAT_MEC is enabled.) 48*b14987cfSBoyan Karatotev endif 49*b14987cfSBoyan Karatotevendif 50*b14987cfSBoyan Karatotev 51*b14987cfSBoyan Karatotev# Handle all invalid build configurations with SPMD usage. 52*b14987cfSBoyan Karatotevifeq (${ENABLE_SPMD_LP}, 1) 53*b14987cfSBoyan Karatotevifneq (${SPD},spmd) 54*b14987cfSBoyan Karatotev $(error Error: ENABLE_SPMD_LP requires SPD=spmd.) 55*b14987cfSBoyan Karatotevendif 56*b14987cfSBoyan Karatotevifeq ($(SPMC_AT_EL3),1) 57*b14987cfSBoyan Karatotev $(error SPMC at EL3 not supported when enabling SPMD Logical partitions.) 58*b14987cfSBoyan Karatotevendif 59*b14987cfSBoyan Karatotevendif 60*b14987cfSBoyan Karatotev 61*b14987cfSBoyan Karatotevifneq (${SPD},none) 62*b14987cfSBoyan Karatotevifeq (${ARCH},aarch32) 63*b14987cfSBoyan Karatotev $(error "Error: SPD is incompatible with AArch32.") 64*b14987cfSBoyan Karatotevendif 65*b14987cfSBoyan Karatotevifdef EL3_PAYLOAD_BASE 66*b14987cfSBoyan Karatotev $(warning "SPD and EL3_PAYLOAD_BASE are incompatible build options.") 67*b14987cfSBoyan Karatotev $(warning "The SPD and its BL32 companion will be present but ignored.") 68*b14987cfSBoyan Karatotevendif 69*b14987cfSBoyan Karatotevifeq (${SPD},spmd) 70*b14987cfSBoyan Karatotevifeq ($(SPMD_SPM_AT_SEL2),1) 71*b14987cfSBoyan Karatotev ifeq ($(SPMC_AT_EL3),1) 72*b14987cfSBoyan Karatotev $(error SPM cannot be enabled in both S-EL2 and EL3.) 73*b14987cfSBoyan Karatotev endif 74*b14987cfSBoyan Karatotev ifeq ($(CTX_INCLUDE_SVE_REGS),1) 75*b14987cfSBoyan Karatotev $(error SVE context management not needed with Hafnium SPMC.) 76*b14987cfSBoyan Karatotev endif 77*b14987cfSBoyan Karatotevendif 78*b14987cfSBoyan Karatotev 79*b14987cfSBoyan Karatotevifeq ($(SPMC_AT_EL3_SEL0_SP),1) 80*b14987cfSBoyan Karatotev ifneq ($(SPMC_AT_EL3),1) 81*b14987cfSBoyan Karatotev $(error SEL0 SP cannot be enabled without SPMC at EL3) 82*b14987cfSBoyan Karatotev endif 83*b14987cfSBoyan Karatotevendif 84*b14987cfSBoyan Karatotevendif #(SPD=spmd) 85*b14987cfSBoyan Karatotevendif #(SPD!=none) 86*b14987cfSBoyan Karatotev 87*b14987cfSBoyan Karatotev# USE_DEBUGFS experimental feature recommended only in debug builds 88*b14987cfSBoyan Karatotevifeq (${USE_DEBUGFS},1) 89*b14987cfSBoyan Karatotev ifeq (${DEBUG},1) 90*b14987cfSBoyan Karatotev $(warning DEBUGFS experimental feature is enabled.) 91*b14987cfSBoyan Karatotev else 92*b14987cfSBoyan Karatotev $(warning DEBUGFS experimental, recommended in DEBUG builds ONLY) 93*b14987cfSBoyan Karatotev endif 94*b14987cfSBoyan Karatotevendif #(USE_DEBUGFS) 95*b14987cfSBoyan Karatotev 96*b14987cfSBoyan Karatotev# USE_SPINLOCK_CAS requires AArch64 build 97*b14987cfSBoyan Karatotevifeq (${USE_SPINLOCK_CAS},1) 98*b14987cfSBoyan Karatotev ifneq (${ARCH},aarch64) 99*b14987cfSBoyan Karatotev $(error USE_SPINLOCK_CAS requires AArch64) 100*b14987cfSBoyan Karatotev endif 101*b14987cfSBoyan Karatotevendif #(USE_SPINLOCK_CAS) 102*b14987cfSBoyan Karatotev 103*b14987cfSBoyan Karatotevifdef EL3_PAYLOAD_BASE 104*b14987cfSBoyan Karatotev ifdef PRELOADED_BL33_BASE 105*b14987cfSBoyan Karatotev $(warning "PRELOADED_BL33_BASE and EL3_PAYLOAD_BASE are \ 106*b14987cfSBoyan Karatotev incompatible build options. EL3_PAYLOAD_BASE has priority.") 107*b14987cfSBoyan Karatotev endif 108*b14987cfSBoyan Karatotev ifneq (${GENERATE_COT},0) 109*b14987cfSBoyan Karatotev $(error "GENERATE_COT and EL3_PAYLOAD_BASE are incompatible \ 110*b14987cfSBoyan Karatotev build options.") 111*b14987cfSBoyan Karatotev endif 112*b14987cfSBoyan Karatotev ifneq (${TRUSTED_BOARD_BOOT},0) 113*b14987cfSBoyan Karatotev $(error "TRUSTED_BOARD_BOOT and EL3_PAYLOAD_BASE are \ 114*b14987cfSBoyan Karatotev incompatible \ build options.") 115*b14987cfSBoyan Karatotev endif 116*b14987cfSBoyan Karatotevendif #(EL3_PAYLOAD_BASE) 117*b14987cfSBoyan Karatotev 118*b14987cfSBoyan Karatotevifeq (${NEED_BL33},yes) 119*b14987cfSBoyan Karatotev ifdef EL3_PAYLOAD_BASE 120*b14987cfSBoyan Karatotev $(warning "BL33 image is not needed when option \ 121*b14987cfSBoyan Karatotev BL33_PAYLOAD_BASE is used and won't be added to the FIP file.") 122*b14987cfSBoyan Karatotev endif 123*b14987cfSBoyan Karatotev ifdef PRELOADED_BL33_BASE 124*b14987cfSBoyan Karatotev $(warning "BL33 image is not needed when option \ 125*b14987cfSBoyan Karatotev PRELOADED_BL33_BASE is used and won't be added to the FIP file.") 126*b14987cfSBoyan Karatotev endif 127*b14987cfSBoyan Karatotevendif #(NEED_BL33) 128*b14987cfSBoyan Karatotev 129*b14987cfSBoyan Karatotev# When building for systems with hardware-assisted coherency, there's no need to 130*b14987cfSBoyan Karatotev# use USE_COHERENT_MEM. Require that USE_COHERENT_MEM must be set to 0 too. 131*b14987cfSBoyan Karatotevifeq ($(HW_ASSISTED_COHERENCY)-$(USE_COHERENT_MEM),1-1) 132*b14987cfSBoyan Karatotev $(error USE_COHERENT_MEM cannot be enabled with HW_ASSISTED_COHERENCY) 133*b14987cfSBoyan Karatotevendif 134*b14987cfSBoyan Karatotev 135*b14987cfSBoyan Karatotev#For now, BL2_IN_XIP_MEM is only supported when RESET_TO_BL2 is 1. 136*b14987cfSBoyan Karatotevifeq ($(RESET_TO_BL2)-$(BL2_IN_XIP_MEM),0-1) 137*b14987cfSBoyan Karatotev $(error "BL2_IN_XIP_MEM is only supported when RESET_TO_BL2 is enabled") 138*b14987cfSBoyan Karatotevendif 139*b14987cfSBoyan Karatotev 140*b14987cfSBoyan Karatotev# RAS_EXTENSION is deprecated, provide alternate build options 141*b14987cfSBoyan Karatotevifeq ($(RAS_EXTENSION),1) 142*b14987cfSBoyan Karatotev $(error "RAS_EXTENSION is now deprecated, please use ENABLE_FEAT_RAS \ 143*b14987cfSBoyan Karatotev and HANDLE_EA_EL3_FIRST_NS instead") 144*b14987cfSBoyan Karatotevendif 145*b14987cfSBoyan Karatotev 146*b14987cfSBoyan Karatotev 147*b14987cfSBoyan Karatotev# When FAULT_INJECTION_SUPPORT is used, require that FEAT_RAS is enabled 148*b14987cfSBoyan Karatotevifeq ($(FAULT_INJECTION_SUPPORT),1) 149*b14987cfSBoyan Karatotev ifeq ($(ENABLE_FEAT_RAS),0) 150*b14987cfSBoyan Karatotev $(error For FAULT_INJECTION_SUPPORT, ENABLE_FEAT_RAS must not be 0) 151*b14987cfSBoyan Karatotev endif 152*b14987cfSBoyan Karatotevendif #(FAULT_INJECTION_SUPPORT) 153*b14987cfSBoyan Karatotev 154*b14987cfSBoyan Karatotev# DYN_DISABLE_AUTH can be set only when TRUSTED_BOARD_BOOT=1 155*b14987cfSBoyan Karatotevifeq ($(DYN_DISABLE_AUTH), 1) 156*b14987cfSBoyan Karatotev ifeq (${TRUSTED_BOARD_BOOT}, 0) 157*b14987cfSBoyan Karatotev $(error "TRUSTED_BOARD_BOOT must be enabled for DYN_DISABLE_AUTH \ 158*b14987cfSBoyan Karatotev to be set.") 159*b14987cfSBoyan Karatotev endif 160*b14987cfSBoyan Karatotevendif #(DYN_DISABLE_AUTH) 161*b14987cfSBoyan Karatotev 162*b14987cfSBoyan Karatotev# SDEI_IN_FCONF is only supported when SDEI_SUPPORT is enabled. 163*b14987cfSBoyan Karatotevifeq ($(SDEI_SUPPORT)-$(SDEI_IN_FCONF),0-1) 164*b14987cfSBoyan Karatotev $(error "SDEI_IN_FCONF is only supported when SDEI_SUPPORT is enabled") 165*b14987cfSBoyan Karatotevendif 166*b14987cfSBoyan Karatotev 167*b14987cfSBoyan Karatotev# If pointer authentication is used in the firmware, make sure that all the 168*b14987cfSBoyan Karatotev# registers associated to it are also saved and restored. 169*b14987cfSBoyan Karatotev# Not doing it would leak the value of the keys used by EL3 to EL1 and S-EL1. 170*b14987cfSBoyan Karatotevifneq ($(ENABLE_PAUTH),0) 171*b14987cfSBoyan Karatotev ifeq ($(CTX_INCLUDE_PAUTH_REGS),0) 172*b14987cfSBoyan Karatotev $(error Pointer Authentication requires CTX_INCLUDE_PAUTH_REGS to be enabled) 173*b14987cfSBoyan Karatotev endif 174*b14987cfSBoyan Karatotevendif #(ENABLE_PAUTH) 175*b14987cfSBoyan Karatotev 176*b14987cfSBoyan Karatotevifneq ($(CTX_INCLUDE_PAUTH_REGS),0) 177*b14987cfSBoyan Karatotev ifneq (${ARCH},aarch64) 178*b14987cfSBoyan Karatotev $(error CTX_INCLUDE_PAUTH_REGS requires AArch64) 179*b14987cfSBoyan Karatotev endif 180*b14987cfSBoyan Karatotevendif #(CTX_INCLUDE_PAUTH_REGS) 181*b14987cfSBoyan Karatotev 182*b14987cfSBoyan Karatotev# Check ENABLE_FEAT_PAUTH_LR 183*b14987cfSBoyan Karatotevifneq (${ENABLE_FEAT_PAUTH_LR},0) 184*b14987cfSBoyan Karatotev 185*b14987cfSBoyan Karatotev# Make sure PAUTH is enabled 186*b14987cfSBoyan Karatotevifeq (${ENABLE_PAUTH},0) 187*b14987cfSBoyan Karatotev $(error Error: PAUTH_LR cannot be used without PAUTH (see BRANCH_PROTECTION)) 188*b14987cfSBoyan Karatotevendif 189*b14987cfSBoyan Karatotev 190*b14987cfSBoyan Karatotev# Make sure SCTLR2 is enabled 191*b14987cfSBoyan Karatotevifeq (${ENABLE_FEAT_SCTLR2},0) 192*b14987cfSBoyan Karatotev $(error Error: PAUTH_LR cannot be used without ENABLE_FEAT_SCTLR2) 193*b14987cfSBoyan Karatotevendif 194*b14987cfSBoyan Karatotev 195*b14987cfSBoyan Karatotev# FEAT_PAUTH_LR is only supported in aarch64 state 196*b14987cfSBoyan Karatotevifneq (${ARCH},aarch64) 197*b14987cfSBoyan Karatotev $(error ENABLE_FEAT_PAUTH_LR requires AArch64) 198*b14987cfSBoyan Karatotevendif 199*b14987cfSBoyan Karatotev 200*b14987cfSBoyan Karatotev# Currently, FEAT_PAUTH_LR is only supported by arm/clang compilers 201*b14987cfSBoyan Karatotev# TODO implement for GCC when support is added 202*b14987cfSBoyan Karatotevifeq ($($(ARCH)-cc-id),arm-clang) 203*b14987cfSBoyan Karatotev arch-features := $(arch-features)+pauth-lr 204*b14987cfSBoyan Karatotevelse 205*b14987cfSBoyan Karatotev $(error Error: ENABLE_FEAT_PAUTH_LR not supported for GCC compiler) 206*b14987cfSBoyan Karatotevendif 207*b14987cfSBoyan Karatotev 208*b14987cfSBoyan Karatotevendif # ${ENABLE_FEAT_PAUTH_LR} 209*b14987cfSBoyan Karatotev 210*b14987cfSBoyan Karatotevifeq ($(FEATURE_DETECTION),1) 211*b14987cfSBoyan Karatotev $(info FEATURE_DETECTION is an experimental feature) 212*b14987cfSBoyan Karatotevendif #(FEATURE_DETECTION) 213*b14987cfSBoyan Karatotev 214*b14987cfSBoyan Karatotevifneq ($(ENABLE_SME2_FOR_NS), 0) 215*b14987cfSBoyan Karatotev ifeq (${ENABLE_SME_FOR_NS}, 0) 216*b14987cfSBoyan Karatotev $(warning "ENABLE_SME2_FOR_NS requires ENABLE_SME_FOR_NS also \ 217*b14987cfSBoyan Karatotev to be set") 218*b14987cfSBoyan Karatotev $(warning "Forced ENABLE_SME_FOR_NS=1") 219*b14987cfSBoyan Karatotev override ENABLE_SME_FOR_NS := 1 220*b14987cfSBoyan Karatotev endif 221*b14987cfSBoyan Karatotevendif #(ENABLE_SME2_FOR_NS) 222*b14987cfSBoyan Karatotev 223*b14987cfSBoyan Karatotevifeq (${ARM_XLAT_TABLES_LIB_V1}, 1) 224*b14987cfSBoyan Karatotev ifeq (${ALLOW_RO_XLAT_TABLES}, 1) 225*b14987cfSBoyan Karatotev $(error "ALLOW_RO_XLAT_TABLES requires translation tables \ 226*b14987cfSBoyan Karatotev library v2") 227*b14987cfSBoyan Karatotev endif 228*b14987cfSBoyan Karatotevendif #(ARM_XLAT_TABLES_LIB_V1) 229*b14987cfSBoyan Karatotev 230*b14987cfSBoyan Karatotevifneq (${DECRYPTION_SUPPORT},none) 231*b14987cfSBoyan Karatotev ifeq (${TRUSTED_BOARD_BOOT}, 0) 232*b14987cfSBoyan Karatotev $(error TRUSTED_BOARD_BOOT must be enabled for DECRYPTION_SUPPORT \ 233*b14987cfSBoyan Karatotev to be set) 234*b14987cfSBoyan Karatotev endif 235*b14987cfSBoyan Karatotevendif #(DECRYPTION_SUPPORT) 236*b14987cfSBoyan Karatotev 237*b14987cfSBoyan Karatotev# Ensure that no Aarch64-only features are enabled in Aarch32 build 238*b14987cfSBoyan Karatotevifeq (${ARCH},aarch32) 239*b14987cfSBoyan Karatotev 240*b14987cfSBoyan Karatotev # SME/SVE only supported on AArch64 241*b14987cfSBoyan Karatotev ifneq (${ENABLE_SME_FOR_NS},0) 242*b14987cfSBoyan Karatotev $(error "ENABLE_SME_FOR_NS cannot be used with ARCH=aarch32") 243*b14987cfSBoyan Karatotev endif 244*b14987cfSBoyan Karatotev 245*b14987cfSBoyan Karatotev ifeq (${ENABLE_SVE_FOR_NS},1) 246*b14987cfSBoyan Karatotev # Warning instead of error due to CI dependency on this 247*b14987cfSBoyan Karatotev $(error "ENABLE_SVE_FOR_NS cannot be used with ARCH=aarch32") 248*b14987cfSBoyan Karatotev endif 249*b14987cfSBoyan Karatotev 250*b14987cfSBoyan Karatotev # BRBE is not supported in AArch32 251*b14987cfSBoyan Karatotev ifeq (${ENABLE_BRBE_FOR_NS},1) 252*b14987cfSBoyan Karatotev $(error "ENABLE_BRBE_FOR_NS cannot be used with ARCH=aarch32") 253*b14987cfSBoyan Karatotev endif 254*b14987cfSBoyan Karatotev 255*b14987cfSBoyan Karatotev # FEAT_RNG_TRAP is not supported in AArch32 256*b14987cfSBoyan Karatotev ifneq (${ENABLE_FEAT_RNG_TRAP},0) 257*b14987cfSBoyan Karatotev $(error "ENABLE_FEAT_RNG_TRAP cannot be used with ARCH=aarch32") 258*b14987cfSBoyan Karatotev endif 259*b14987cfSBoyan Karatotev 260*b14987cfSBoyan Karatotev ifneq (${ENABLE_FEAT_FPMR},0) 261*b14987cfSBoyan Karatotev $(error "ENABLE_FEAT_FPMR cannot be used with ARCH=aarch32") 262*b14987cfSBoyan Karatotev endif 263*b14987cfSBoyan Karatotev 264*b14987cfSBoyan Karatotev ifeq (${ARCH_FEATURE_AVAILABILITY},1) 265*b14987cfSBoyan Karatotev $(error "ARCH_FEATURE_AVAILABILITY cannot be used with ARCH=aarch32") 266*b14987cfSBoyan Karatotev endif 267*b14987cfSBoyan Karatotev # FEAT_MOPS is only supported on AArch64 268*b14987cfSBoyan Karatotev ifneq (${ENABLE_FEAT_MOPS},0) 269*b14987cfSBoyan Karatotev $(error "ENABLE_FEAT_MOPS cannot be used with ARCH=aarch32") 270*b14987cfSBoyan Karatotev endif 271*b14987cfSBoyan Karatotev ifneq (${ENABLE_FEAT_GCIE},0) 272*b14987cfSBoyan Karatotev $(error "ENABLE_FEAT_GCIE cannot be used with ARCH=aarch32") 273*b14987cfSBoyan Karatotev endif 274*b14987cfSBoyan Karatotevendif #(ARCH=aarch32) 275*b14987cfSBoyan Karatotev 276*b14987cfSBoyan Karatotevifneq (${ENABLE_FEAT_FPMR},0) 277*b14987cfSBoyan Karatotev ifeq (${ENABLE_FEAT_FGT},0) 278*b14987cfSBoyan Karatotev $(error "ENABLE_FEAT_FPMR requires ENABLE_FEAT_FGT") 279*b14987cfSBoyan Karatotev endif 280*b14987cfSBoyan Karatotev ifeq (${ENABLE_FEAT_HCX},0) 281*b14987cfSBoyan Karatotev $(error "ENABLE_FEAT_FPMR requires ENABLE_FEAT_HCX") 282*b14987cfSBoyan Karatotev endif 283*b14987cfSBoyan Karatotevendif #(ENABLE_FEAT_FPMR) 284*b14987cfSBoyan Karatotev 285*b14987cfSBoyan Karatotevifneq (${ENABLE_SME_FOR_NS},0) 286*b14987cfSBoyan Karatotev ifeq (${ENABLE_SVE_FOR_NS},0) 287*b14987cfSBoyan Karatotev $(error "ENABLE_SME_FOR_NS requires ENABLE_SVE_FOR_NS") 288*b14987cfSBoyan Karatotev endif 289*b14987cfSBoyan Karatotevendif #(ENABLE_SME_FOR_NS) 290*b14987cfSBoyan Karatotev 291*b14987cfSBoyan Karatotev# Secure SME/SVE requires the non-secure component as well 292*b14987cfSBoyan Karatotevifeq (${ENABLE_SME_FOR_SWD},1) 293*b14987cfSBoyan Karatotev ifeq (${ENABLE_SME_FOR_NS},0) 294*b14987cfSBoyan Karatotev $(error "ENABLE_SME_FOR_SWD requires ENABLE_SME_FOR_NS") 295*b14987cfSBoyan Karatotev endif 296*b14987cfSBoyan Karatotev ifeq (${ENABLE_SVE_FOR_SWD},0) 297*b14987cfSBoyan Karatotev $(error "ENABLE_SME_FOR_SWD requires ENABLE_SVE_FOR_SWD") 298*b14987cfSBoyan Karatotev endif 299*b14987cfSBoyan Karatotevendif #(ENABLE_SME_FOR_SWD) 300*b14987cfSBoyan Karatotev 301*b14987cfSBoyan Karatotev# Enabling SVE for SWD requires enabling SVE for NWD due to ENABLE_FEAT 302*b14987cfSBoyan Karatotev# mechanism. 303*b14987cfSBoyan Karatotevifeq (${ENABLE_SVE_FOR_SWD},1) 304*b14987cfSBoyan Karatotev ifeq (${ENABLE_SVE_FOR_NS},0) 305*b14987cfSBoyan Karatotev $(error "ENABLE_SVE_FOR_SWD requires ENABLE_SVE_FOR_NS") 306*b14987cfSBoyan Karatotev endif 307*b14987cfSBoyan Karatotevendif 308*b14987cfSBoyan Karatotev 309*b14987cfSBoyan Karatotev# Enabling FEAT_MOPS requires access to hcrx_el2 registers which is 310*b14987cfSBoyan Karatotev# available only when FEAT_HCX is enabled. 311*b14987cfSBoyan Karatotevifneq (${ENABLE_FEAT_MOPS},0) 312*b14987cfSBoyan Karatotev ifeq (${ENABLE_FEAT_HCX},0) 313*b14987cfSBoyan Karatotev $(error "ENABLE_FEAT_MOPS requires ENABLE_FEAT_HCX") 314*b14987cfSBoyan Karatotev endif 315*b14987cfSBoyan Karatotevendif 316*b14987cfSBoyan Karatotev 317*b14987cfSBoyan Karatotev# Enabling SVE for both the worlds typically requires the context 318*b14987cfSBoyan Karatotev# management of SVE registers. The only exception being SPMC at S-EL2. 319*b14987cfSBoyan Karatotevifeq (${ENABLE_SVE_FOR_SWD}, 1) 320*b14987cfSBoyan Karatotev ifneq (${ENABLE_SVE_FOR_NS}, 0) 321*b14987cfSBoyan Karatotev ifeq (${CTX_INCLUDE_SVE_REGS}-$(SPMD_SPM_AT_SEL2),0-0) 322*b14987cfSBoyan Karatotev $(warning "ENABLE_SVE_FOR_SWD and ENABLE_SVE_FOR_NS together require CTX_INCLUDE_SVE_REGS") 323*b14987cfSBoyan Karatotev endif 324*b14987cfSBoyan Karatotev endif 325*b14987cfSBoyan Karatotevendif 326*b14987cfSBoyan Karatotev 327*b14987cfSBoyan Karatotev# Enabling SVE in either world while enabling CTX_INCLUDE_FPREGS requires 328*b14987cfSBoyan Karatotev# CTX_INCLUDE_SVE_REGS to be enabled due to architectural dependency between FP 329*b14987cfSBoyan Karatotev# and SVE registers. 330*b14987cfSBoyan Karatotevifeq (${CTX_INCLUDE_FPREGS}, 1) 331*b14987cfSBoyan Karatotev ifneq (${ENABLE_SVE_FOR_NS},0) 332*b14987cfSBoyan Karatotev ifeq (${CTX_INCLUDE_SVE_REGS},0) 333*b14987cfSBoyan Karatotev # Warning instead of error due to CI dependency on this 334*b14987cfSBoyan Karatotev $(warning "CTX_INCLUDE_FPREGS and ENABLE_SVE_FOR_NS together require CTX_INCLUDE_SVE_REGS") 335*b14987cfSBoyan Karatotev $(warning "Forced ENABLE_SVE_FOR_NS=0") 336*b14987cfSBoyan Karatotev override ENABLE_SVE_FOR_NS := 0 337*b14987cfSBoyan Karatotev endif 338*b14987cfSBoyan Karatotev endif 339*b14987cfSBoyan Karatotevendif #(CTX_INCLUDE_FPREGS) 340*b14987cfSBoyan Karatotev 341*b14987cfSBoyan Karatotev# SVE context management is only required if secure world has access to SVE/FP 342*b14987cfSBoyan Karatotev# functionality. 343*b14987cfSBoyan Karatotevifeq (${CTX_INCLUDE_SVE_REGS},1) 344*b14987cfSBoyan Karatotev ifeq (${ENABLE_SVE_FOR_SWD},0) 345*b14987cfSBoyan Karatotev $(error "CTX_INCLUDE_SVE_REGS requires ENABLE_SVE_FOR_SWD to also be enabled") 346*b14987cfSBoyan Karatotev endif 347*b14987cfSBoyan Karatotevendif 348*b14987cfSBoyan Karatotev 349*b14987cfSBoyan Karatotev# SME cannot be used with CTX_INCLUDE_FPREGS since SPM does its own context 350*b14987cfSBoyan Karatotev# management including FPU registers. 351*b14987cfSBoyan Karatotevifeq (${CTX_INCLUDE_FPREGS},1) 352*b14987cfSBoyan Karatotev ifneq (${ENABLE_SME_FOR_NS},0) 353*b14987cfSBoyan Karatotev $(error "ENABLE_SME_FOR_NS cannot be used with CTX_INCLUDE_FPREGS") 354*b14987cfSBoyan Karatotev endif 355*b14987cfSBoyan Karatotevendif #(CTX_INCLUDE_FPREGS) 356*b14987cfSBoyan Karatotev 357*b14987cfSBoyan Karatotevifeq ($(DRTM_SUPPORT),1) 358*b14987cfSBoyan Karatotev $(info DRTM_SUPPORT is an experimental feature) 359*b14987cfSBoyan Karatotevendif 360*b14987cfSBoyan Karatotev 361*b14987cfSBoyan Karatotevifeq (${HOB_LIST},1) 362*b14987cfSBoyan Karatotev $(warning HOB_LIST is an experimental feature) 363*b14987cfSBoyan Karatotevendif 364*b14987cfSBoyan Karatotev 365*b14987cfSBoyan Karatotevifeq (${TRANSFER_LIST},1) 366*b14987cfSBoyan Karatotev $(info TRANSFER_LIST is an experimental feature) 367*b14987cfSBoyan Karatotevendif 368*b14987cfSBoyan Karatotev 369*b14987cfSBoyan Karatotevifeq (${ENABLE_RME},1) 370*b14987cfSBoyan Karatotev ifneq (${SEPARATE_CODE_AND_RODATA},1) 371*b14987cfSBoyan Karatotev $(error `ENABLE_RME=1` requires `SEPARATE_CODE_AND_RODATA=1`) 372*b14987cfSBoyan Karatotev endif 373*b14987cfSBoyan Karatotevendif 374*b14987cfSBoyan Karatotev 375*b14987cfSBoyan Karatotevifeq ($(PSA_CRYPTO),1) 376*b14987cfSBoyan Karatotev $(info PSA_CRYPTO is an experimental feature) 377*b14987cfSBoyan Karatotevendif 378*b14987cfSBoyan Karatotev 379*b14987cfSBoyan Karatotevifeq ($(DICE_PROTECTION_ENVIRONMENT),1) 380*b14987cfSBoyan Karatotev $(info DICE_PROTECTION_ENVIRONMENT is an experimental feature) 381*b14987cfSBoyan Karatotevendif 382*b14987cfSBoyan Karatotev 383*b14987cfSBoyan Karatotevifeq (${LFA_SUPPORT},1) 384*b14987cfSBoyan Karatotev $(warning LFA_SUPPORT is an experimental feature) 385*b14987cfSBoyan Karatotevendif #(LFA_SUPPORT) 386