16a0da736SJayanth Dodderi Chidanand# 2f5211420SGovindraj Raja# Copyright (c) 2022-2023, Arm Limited. All rights reserved. 36a0da736SJayanth Dodderi Chidanand# 46a0da736SJayanth Dodderi Chidanand# SPDX-License-Identifier: BSD-3-Clause 56a0da736SJayanth Dodderi Chidanand# 66a0da736SJayanth Dodderi Chidanand 7f5211420SGovindraj Raja# This file lists all of the architectural features, and initializes 8f5211420SGovindraj Raja# and enables them based on the configured architecture version. 9f5211420SGovindraj Raja 10f5211420SGovindraj Raja# This file follows the following format: 11*fb730117SGovindraj Raja# - Enable mandatory feature if applicable to an Arch Version. 12*fb730117SGovindraj Raja# - By default disable any mandatory features if they have not been defined yet. 13f5211420SGovindraj Raja# - Disable or enable any optional feature this would be enabled/disabled if needed by platform. 14f5211420SGovindraj Raja 15f5211420SGovindraj Raja# 16f5211420SGovindraj Raja################################################################################ 17f5211420SGovindraj Raja# Enable Mandatory features based on Arch versions. 18f5211420SGovindraj Raja################################################################################ 19f5211420SGovindraj Raja# 206a0da736SJayanth Dodderi Chidanand 216a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.1 and upwards. 226a0da736SJayanth Dodderi Chidanandifeq "8.1" "$(word 1, $(sort 8.1 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 23f5211420SGovindraj RajaENABLE_FEAT_PAN := 1 24f5211420SGovindraj RajaENABLE_FEAT_VHE := 1 256a0da736SJayanth Dodderi Chidanandendif 266a0da736SJayanth Dodderi Chidanand 279202d519SManish Pandey# Enable the features which are mandatory from ARCH version 8.2 and upwards. 289202d519SManish Pandeyifeq "8.2" "$(word 1, $(sort 8.2 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 29f5211420SGovindraj RajaENABLE_FEAT_RAS := 1 309202d519SManish Pandeyendif 319202d519SManish Pandey 326a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.4 and upwards. 336a0da736SJayanth Dodderi Chidanandifeq "8.4" "$(word 1, $(sort 8.4 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 34f5211420SGovindraj RajaENABLE_FEAT_SEL2 := 1 35f5211420SGovindraj RajaENABLE_TRF_FOR_NS := 1 36f5211420SGovindraj RajaENABLE_FEAT_DIT := 1 376a0da736SJayanth Dodderi Chidanandendif 386a0da736SJayanth Dodderi Chidanand 396a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.5 and upwards. 406a0da736SJayanth Dodderi Chidanandifeq "8.5" "$(word 1, $(sort 8.5 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 41f5211420SGovindraj RajaENABLE_FEAT_RNG := 1 42f5211420SGovindraj RajaENABLE_FEAT_SB := 1 43f5211420SGovindraj Raja 44f5211420SGovindraj Raja# Enable Memory tagging, Branch Target Identification for aarch64 only. 45f5211420SGovindraj Rajaifeq ($(ARCH), aarch64) 46f5211420SGovindraj Raja mem_tag_arch_support := yes 47f5211420SGovindraj Rajaendif #(ARCH=aarch64) 48f5211420SGovindraj Raja 496a0da736SJayanth Dodderi Chidanandendif 506a0da736SJayanth Dodderi Chidanand 516a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.6 and upwards. 526a0da736SJayanth Dodderi Chidanandifeq "8.6" "$(word 1, $(sort 8.6 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 53f5211420SGovindraj RajaENABLE_FEAT_ECV := 1 54f5211420SGovindraj RajaENABLE_FEAT_FGT := 1 556a0da736SJayanth Dodderi Chidanandendif 566a0da736SJayanth Dodderi Chidanand 576a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.7 and upwards. 586a0da736SJayanth Dodderi Chidanandifeq "8.7" "$(word 1, $(sort 8.7 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 59f5211420SGovindraj RajaENABLE_FEAT_HCX := 1 606a0da736SJayanth Dodderi Chidanandendif 61f5211420SGovindraj Raja 62f5211420SGovindraj Raja# Enable the features which are mandatory from ARCH version 8.9 and upwards. 63f5211420SGovindraj Rajaifeq "8.9" "$(word 1, $(sort 8.9 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 64f5211420SGovindraj RajaENABLE_FEAT_TCR2 := 1 65f5211420SGovindraj Rajaendif 66f5211420SGovindraj Raja 67f5211420SGovindraj Raja# 68f5211420SGovindraj Raja################################################################################ 69*fb730117SGovindraj Raja# Set mandatory features by default to zero. 70*fb730117SGovindraj Raja################################################################################ 71*fb730117SGovindraj Raja# 72*fb730117SGovindraj Raja 73*fb730117SGovindraj Raja#---- 74*fb730117SGovindraj Raja# 8.1 75*fb730117SGovindraj Raja#---- 76*fb730117SGovindraj Raja 77*fb730117SGovindraj Raja# Flag to enable access to Privileged Access Never bit of PSTATE. 78*fb730117SGovindraj RajaENABLE_FEAT_PAN ?= 0 79*fb730117SGovindraj Raja 80*fb730117SGovindraj Raja# Flag to enable Virtualization Host Extensions. 81*fb730117SGovindraj RajaENABLE_FEAT_VHE ?= 0 82*fb730117SGovindraj Raja 83*fb730117SGovindraj Raja#---- 84*fb730117SGovindraj Raja# 8.2 85*fb730117SGovindraj Raja#---- 86*fb730117SGovindraj Raja 87*fb730117SGovindraj Raja# Enable RAS Support. 88*fb730117SGovindraj RajaENABLE_FEAT_RAS ?= 0 89*fb730117SGovindraj Raja 90*fb730117SGovindraj Raja#---- 91*fb730117SGovindraj Raja# 8.3 92*fb730117SGovindraj Raja#---- 93*fb730117SGovindraj Raja 94*fb730117SGovindraj Raja# Flag to enable Pointer Authentication. Internal flag not meant for 95*fb730117SGovindraj Raja# direct setting. Use BRANCH_PROTECTION to enable PAUTH. 96*fb730117SGovindraj RajaENABLE_PAUTH ?= 0 97*fb730117SGovindraj Raja 98*fb730117SGovindraj Raja# Include pointer authentication (ARMv8.3-PAuth) registers in cpu context. This 99*fb730117SGovindraj Raja# must be set to 1 if the platform wants to use this feature in the Secure 100*fb730117SGovindraj Raja# world. It is not necessary for use in the Non-secure world. 101*fb730117SGovindraj RajaCTX_INCLUDE_PAUTH_REGS ?= 0 102*fb730117SGovindraj Raja 103*fb730117SGovindraj Raja 104*fb730117SGovindraj Raja#---- 105*fb730117SGovindraj Raja# 8.4 106*fb730117SGovindraj Raja#---- 107*fb730117SGovindraj Raja 108*fb730117SGovindraj Raja# Flag to enable Secure EL-2 feature. 109*fb730117SGovindraj RajaENABLE_FEAT_SEL2 ?= 0 110*fb730117SGovindraj Raja 111*fb730117SGovindraj Raja# By default, disable trace filter control register access to lower non-secure 112*fb730117SGovindraj Raja# exception levels, i.e. NS-EL2, or NS-EL1 if NS-EL2 is implemented, but 113*fb730117SGovindraj Raja# trace filter control register access is unused if FEAT_TRF is implemented. 114*fb730117SGovindraj RajaENABLE_TRF_FOR_NS ?= 0 115*fb730117SGovindraj Raja 116*fb730117SGovindraj Raja# Flag to enable Data Independent Timing instructions. 117*fb730117SGovindraj RajaENABLE_FEAT_DIT ?= 0 118*fb730117SGovindraj Raja 119*fb730117SGovindraj Raja#---- 120*fb730117SGovindraj Raja# 8.5 121*fb730117SGovindraj Raja#---- 122*fb730117SGovindraj Raja 123*fb730117SGovindraj Raja# Flag to enable Branch Target Identification. 124*fb730117SGovindraj Raja# Internal flag not meant for direct setting. 125*fb730117SGovindraj Raja# Use BRANCH_PROTECTION to enable BTI. 126*fb730117SGovindraj RajaENABLE_BTI ?= 0 127*fb730117SGovindraj Raja 128*fb730117SGovindraj Raja# Flag to enable access to the Random Number Generator registers. 129*fb730117SGovindraj RajaENABLE_FEAT_RNG ?= 0 130*fb730117SGovindraj Raja 131*fb730117SGovindraj Raja# Flag to enable Speculation Barrier Instruction. 132*fb730117SGovindraj RajaENABLE_FEAT_SB ?= 0 133*fb730117SGovindraj Raja 134*fb730117SGovindraj Raja#---- 135*fb730117SGovindraj Raja# 8.6 136*fb730117SGovindraj Raja#---- 137*fb730117SGovindraj Raja 138*fb730117SGovindraj Raja# Flag to enable access to the CNTPOFF_EL2 register. 139*fb730117SGovindraj RajaENABLE_FEAT_ECV ?= 0 140*fb730117SGovindraj Raja 141*fb730117SGovindraj Raja# Flag to enable access to the HDFGRTR_EL2 register. 142*fb730117SGovindraj RajaENABLE_FEAT_FGT ?= 0 143*fb730117SGovindraj Raja 144*fb730117SGovindraj Raja#---- 145*fb730117SGovindraj Raja# 8.7 146*fb730117SGovindraj Raja#---- 147*fb730117SGovindraj Raja 148*fb730117SGovindraj Raja# Flag to enable access to the HCRX_EL2 register by setting SCR_EL3.HXEn. 149*fb730117SGovindraj RajaENABLE_FEAT_HCX ?= 0 150*fb730117SGovindraj Raja 151*fb730117SGovindraj Raja#---- 152*fb730117SGovindraj Raja# 8.9 153*fb730117SGovindraj Raja#---- 154*fb730117SGovindraj Raja 155*fb730117SGovindraj Raja# Flag to enable access to TCR2 (FEAT_TCR2). 156*fb730117SGovindraj RajaENABLE_FEAT_TCR2 ?= 0 157*fb730117SGovindraj Raja 158*fb730117SGovindraj Raja# 159*fb730117SGovindraj Raja################################################################################ 160f5211420SGovindraj Raja# Optional Features defaulted to 0 or 2, if they are not enabled from 161f5211420SGovindraj Raja# build option. Can also be disabled or enabled by platform if needed. 162f5211420SGovindraj Raja################################################################################ 163f5211420SGovindraj Raja# 164f5211420SGovindraj Raja 165f5211420SGovindraj Raja#---- 166f5211420SGovindraj Raja# 8.0 167f5211420SGovindraj Raja#---- 168f5211420SGovindraj Raja 169f5211420SGovindraj Raja# Flag to enable CSV2_2 extension. 170f5211420SGovindraj RajaENABLE_FEAT_CSV2_2 ?= 0 171f5211420SGovindraj Raja 172f5211420SGovindraj Raja# By default, disable access of trace system registers from NS lower 173f5211420SGovindraj Raja# ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused if 174f5211420SGovindraj Raja# system register trace is implemented. This feature is available if 175f5211420SGovindraj Raja# trace unit such as ETMv4.x, This feature is OPTIONAL and is only 176f5211420SGovindraj Raja# permitted in Armv8 implementations. 177f5211420SGovindraj RajaENABLE_SYS_REG_TRACE_FOR_NS ?= 0 178f5211420SGovindraj Raja 179f5211420SGovindraj Raja#---- 180f5211420SGovindraj Raja# 8.2 181f5211420SGovindraj Raja#---- 182f5211420SGovindraj Raja 183f5211420SGovindraj Raja# Build option to enable/disable the Statistical Profiling Extension, 184f5211420SGovindraj Raja# keep it enabled by default for AArch64. 185f5211420SGovindraj Rajaifeq (${ARCH},aarch64) 186f5211420SGovindraj Raja ENABLE_SPE_FOR_NS ?= 2 187f5211420SGovindraj Rajaelse ifeq (${ARCH},aarch32) 188f5211420SGovindraj Raja ifdef ENABLE_SPE_FOR_NS 189f5211420SGovindraj Raja $(error ENABLE_SPE_FOR_NS is not supported for AArch32) 190f5211420SGovindraj Raja else 191f5211420SGovindraj Raja ENABLE_SPE_FOR_NS := 0 192f5211420SGovindraj Raja endif 193f5211420SGovindraj Rajaendif 194f5211420SGovindraj Raja 195f5211420SGovindraj Raja# Enable SVE for non-secure world by default. 196f5211420SGovindraj Rajaifeq (${ARCH},aarch64) 197f5211420SGovindraj Raja ENABLE_SVE_FOR_NS ?= 2 198f5211420SGovindraj Raja# SVE is only supported on AArch64 so disable it on AArch32. 199f5211420SGovindraj Rajaelse ifeq (${ARCH},aarch32) 200f5211420SGovindraj Raja ifdef ENABLE_SVE_FOR_NS 201f5211420SGovindraj Raja $(error ENABLE_SVE_FOR_NS is not supported for AArch32) 202f5211420SGovindraj Raja else 203f5211420SGovindraj Raja ENABLE_SVE_FOR_NS := 0 204f5211420SGovindraj Raja endif 205f5211420SGovindraj Rajaendif 206f5211420SGovindraj Raja 207f5211420SGovindraj Raja#---- 208f5211420SGovindraj Raja# 8.4 209f5211420SGovindraj Raja#---- 210f5211420SGovindraj Raja 211f5211420SGovindraj Raja# Feature flags for supporting Activity monitor extensions. 212f5211420SGovindraj RajaENABLE_FEAT_AMU ?= 0 213f5211420SGovindraj RajaENABLE_AMU_AUXILIARY_COUNTERS ?= 0 214f5211420SGovindraj RajaENABLE_AMU_FCONF ?= 0 215f5211420SGovindraj RajaAMU_RESTRICT_COUNTERS ?= 0 216f5211420SGovindraj Raja 217f5211420SGovindraj Raja# Build option to enable MPAM for lower ELs. 218edebefbcSArvind Ram Prakash# Enabling it by default 219edebefbcSArvind Ram Prakashifeq (${ARCH},aarch64) 220edebefbcSArvind Ram Prakash ENABLE_FEAT_MPAM ?= 2 221edebefbcSArvind Ram Prakashelse ifeq (${ARCH},aarch32) 222edebefbcSArvind Ram Prakash ifdef ENABLE_FEAT_MPAM 223edebefbcSArvind Ram Prakash $(error ENABLE_FEAT_MPAM is not supported for AArch32) 224edebefbcSArvind Ram Prakash else 225edebefbcSArvind Ram Prakash ENABLE_FEAT_MPAM := 0 226edebefbcSArvind Ram Prakash endif 227edebefbcSArvind Ram Prakashendif 228f5211420SGovindraj Raja 2298b2048c1SGovindraj Raja# Include nested virtualization control (Armv8.4-NV) registers in cpu context. 2308b2048c1SGovindraj Raja# This must be set to 1 if architecture implements Nested Virtualization 2318b2048c1SGovindraj Raja# Extension and platform wants to use this feature in the Secure world. 2328b2048c1SGovindraj RajaCTX_INCLUDE_NEVE_REGS ?= 0 2338b2048c1SGovindraj Raja 234f5211420SGovindraj Raja#---- 235f5211420SGovindraj Raja# 8.5 236f5211420SGovindraj Raja#---- 237f5211420SGovindraj Raja 238f5211420SGovindraj Raja# Flag to enable support for EL3 trapping of reads of the RNDR and RNDRRS 239f5211420SGovindraj Raja# registers, by setting SCR_EL3.TRNDR. 240f5211420SGovindraj RajaENABLE_FEAT_RNG_TRAP ?= 0 241f5211420SGovindraj Raja 242f5211420SGovindraj Raja# Include Memory Tagging Extension registers in cpu context. This must be set 243f5211420SGovindraj Raja# to 1 if the platform wants to use this feature in the Secure world and MTE is 244f5211420SGovindraj Raja# enabled at ELX. 245f5211420SGovindraj RajaCTX_INCLUDE_MTE_REGS ?= 0 246f5211420SGovindraj Raja 247f5211420SGovindraj Raja#---- 248f5211420SGovindraj Raja# 8.6 249f5211420SGovindraj Raja#---- 250f5211420SGovindraj Raja 251f5211420SGovindraj Raja# Flag to enable AMUv1p1 extension. 252f5211420SGovindraj RajaENABLE_FEAT_AMUv1p1 ?= 0 253f5211420SGovindraj Raja 254f5211420SGovindraj Raja# Flag to enable delayed trapping of WFE instruction (FEAT_TWED). 255f5211420SGovindraj RajaENABLE_FEAT_TWED ?= 0 256f5211420SGovindraj Raja 257f5211420SGovindraj Raja# In v8.6+ platforms with delayed trapping of WFE being supported 258f5211420SGovindraj Raja# via FEAT_TWED, this flag takes the delay value to be set in the 259f5211420SGovindraj Raja# SCR_EL3.TWEDEL(4bit) field, when FEAT_TWED is implemented. 260f5211420SGovindraj Raja# By default it takes 0, and need to be updated by the platforms. 261f5211420SGovindraj RajaTWED_DELAY ?= 0 262f5211420SGovindraj Raja 263f5211420SGovindraj Raja# Disable MTPMU if FEAT_MTPMU is supported. 264f5211420SGovindraj RajaDISABLE_MTPMU ?= 0 265f5211420SGovindraj Raja 266f5211420SGovindraj Raja#---- 267f5211420SGovindraj Raja# 8.9 268f5211420SGovindraj Raja#---- 269f5211420SGovindraj Raja 270f5211420SGovindraj Raja# Flag to enable NoTagAccess memory region attribute for stage 2 of translation. 271f5211420SGovindraj RajaENABLE_FEAT_MTE_PERM ?= 0 272f5211420SGovindraj Raja 273f5211420SGovindraj Raja# Flag to enable access to Stage 2 Permission Indirection (FEAT_S2PIE). 274f5211420SGovindraj RajaENABLE_FEAT_S2PIE ?= 0 275f5211420SGovindraj Raja 276f5211420SGovindraj Raja# Flag to enable access to Stage 1 Permission Indirection (FEAT_S1PIE). 277f5211420SGovindraj RajaENABLE_FEAT_S1PIE ?= 0 278f5211420SGovindraj Raja 279f5211420SGovindraj Raja# Flag to enable access to Stage 2 Permission Overlay (FEAT_S2POE). 280f5211420SGovindraj RajaENABLE_FEAT_S2POE ?= 0 281f5211420SGovindraj Raja 282f5211420SGovindraj Raja# Flag to enable access to Stage 1 Permission Overlay (FEAT_S1POE). 283f5211420SGovindraj RajaENABLE_FEAT_S1POE ?= 0 284f5211420SGovindraj Raja 285f5211420SGovindraj Raja#---- 286f5211420SGovindraj Raja# 9.0 287f5211420SGovindraj Raja#---- 288f5211420SGovindraj Raja 289f5211420SGovindraj Raja# Flag to enable Realm Management Extension (FEAT_RME). 290f5211420SGovindraj RajaENABLE_RME ?= 0 291f5211420SGovindraj Raja 292f5211420SGovindraj Raja# Scalable Matrix Extension for non-secure world. 293f5211420SGovindraj RajaENABLE_SME_FOR_NS ?= 0 294f5211420SGovindraj Raja 295f5211420SGovindraj Raja# Scalable Vector Extension for secure world. 296f5211420SGovindraj RajaENABLE_SVE_FOR_SWD ?= 0 297f5211420SGovindraj Raja 298f5211420SGovindraj Raja# By default, disable access of trace buffer control registers from NS 299f5211420SGovindraj Raja# lower ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused 300f5211420SGovindraj Raja# if FEAT_TRBE is implemented. 301f5211420SGovindraj Raja# Note FEAT_TRBE is only supported on AArch64 - therefore do not enable in 302f5211420SGovindraj Raja# AArch32. 303f5211420SGovindraj Rajaifeq (${ARCH},aarch64) 304f5211420SGovindraj Raja ENABLE_TRBE_FOR_NS ?= 0 305f5211420SGovindraj Rajaelse ifeq (${ARCH},aarch32) 306f5211420SGovindraj Raja ifdef ENABLE_TRBE_FOR_NS 307f5211420SGovindraj Raja $(error ENABLE_TRBE_FOR_NS is not supported for AArch32) 308f5211420SGovindraj Raja else 309f5211420SGovindraj Raja ENABLE_TRBE_FOR_NS := 0 310f5211420SGovindraj Raja endif 311f5211420SGovindraj Rajaendif 312f5211420SGovindraj Raja 313f5211420SGovindraj Raja#---- 314f5211420SGovindraj Raja# 9.2 315f5211420SGovindraj Raja#---- 316f5211420SGovindraj Raja 317f5211420SGovindraj Raja# Scalable Matrix Extension version 2 for non-secure world. 318f5211420SGovindraj RajaENABLE_SME2_FOR_NS ?= 0 319f5211420SGovindraj Raja 320f5211420SGovindraj Raja# Scalable Matrix Extension for secure world. 321f5211420SGovindraj RajaENABLE_SME_FOR_SWD ?= 0 322f5211420SGovindraj Raja 323f5211420SGovindraj Raja# By default, disable access to branch record buffer control registers from NS 324f5211420SGovindraj Raja# lower ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused 325f5211420SGovindraj Raja# if FEAT_BRBE is implemented. 326f5211420SGovindraj RajaENABLE_BRBE_FOR_NS ?= 0 327f5211420SGovindraj Raja 328f5211420SGovindraj Raja#---- 329f5211420SGovindraj Raja#9.4 330f5211420SGovindraj Raja#---- 331f5211420SGovindraj Raja 332f5211420SGovindraj Raja# Flag to enable access to Guarded Control Stack (FEAT_GCS). 333f5211420SGovindraj RajaENABLE_FEAT_GCS ?= 0 334