16a0da736SJayanth Dodderi Chidanand# 2*f5211420SGovindraj Raja# Copyright (c) 2022-2023, Arm Limited. All rights reserved. 36a0da736SJayanth Dodderi Chidanand# 46a0da736SJayanth Dodderi Chidanand# SPDX-License-Identifier: BSD-3-Clause 56a0da736SJayanth Dodderi Chidanand# 66a0da736SJayanth Dodderi Chidanand 7*f5211420SGovindraj Raja# This file lists all of the architectural features, and initializes 8*f5211420SGovindraj Raja# and enables them based on the configured architecture version. 9*f5211420SGovindraj Raja 10*f5211420SGovindraj Raja# This file follows the following format: 11*f5211420SGovindraj Raja# - By default disable any mandatory features. 12*f5211420SGovindraj Raja# - Then Enable mandatory feature if applicable to an Arch Version. 13*f5211420SGovindraj Raja# - Disable or enable any optional feature this would be enabled/disabled if needed by platform. 14*f5211420SGovindraj Raja 15*f5211420SGovindraj Raja# 16*f5211420SGovindraj Raja################################################################################ 17*f5211420SGovindraj Raja# Set mandatory features by default to zero. 18*f5211420SGovindraj Raja################################################################################ 19*f5211420SGovindraj Raja# 20*f5211420SGovindraj Raja 21*f5211420SGovindraj Raja#---- 22*f5211420SGovindraj Raja# 8.1 23*f5211420SGovindraj Raja#---- 24*f5211420SGovindraj Raja 25*f5211420SGovindraj Raja# Flag to enable access to Privileged Access Never bit of PSTATE. 26*f5211420SGovindraj RajaENABLE_FEAT_PAN := 0 27*f5211420SGovindraj Raja 28*f5211420SGovindraj Raja# Flag to enable Virtualization Host Extensions. 29*f5211420SGovindraj RajaENABLE_FEAT_VHE := 0 30*f5211420SGovindraj Raja 31*f5211420SGovindraj Raja#---- 32*f5211420SGovindraj Raja# 8.2 33*f5211420SGovindraj Raja#---- 34*f5211420SGovindraj Raja 35*f5211420SGovindraj Raja# Enable RAS Support. 36*f5211420SGovindraj RajaENABLE_FEAT_RAS := 0 37*f5211420SGovindraj Raja 38*f5211420SGovindraj Raja#---- 39*f5211420SGovindraj Raja# 8.3 40*f5211420SGovindraj Raja#---- 41*f5211420SGovindraj Raja 42*f5211420SGovindraj Raja# Flag to enable Pointer Authentication. Internal flag not meant for 43*f5211420SGovindraj Raja# direct setting. Use BRANCH_PROTECTION to enable PAUTH. 44*f5211420SGovindraj RajaENABLE_PAUTH := 0 45*f5211420SGovindraj Raja 46*f5211420SGovindraj Raja# Include pointer authentication (ARMv8.3-PAuth) registers in cpu context. This 47*f5211420SGovindraj Raja# must be set to 1 if the platform wants to use this feature in the Secure 48*f5211420SGovindraj Raja# world. It is not necessary for use in the Non-secure world. 49*f5211420SGovindraj RajaCTX_INCLUDE_PAUTH_REGS := 0 50*f5211420SGovindraj Raja 51*f5211420SGovindraj Raja#---- 52*f5211420SGovindraj Raja# 8.4 53*f5211420SGovindraj Raja#---- 54*f5211420SGovindraj Raja 55*f5211420SGovindraj Raja# Flag to enable Secure EL-2 feature. 56*f5211420SGovindraj RajaENABLE_FEAT_SEL2 := 0 57*f5211420SGovindraj Raja 58*f5211420SGovindraj Raja# Include nested virtualization control (Armv8.4-NV) registers in cpu context. 59*f5211420SGovindraj Raja# This must be set to 1 if architecture implements Nested Virtualization 60*f5211420SGovindraj Raja# Extension and platform wants to use this feature in the Secure world. 61*f5211420SGovindraj RajaCTX_INCLUDE_NEVE_REGS := 0 62*f5211420SGovindraj Raja 63*f5211420SGovindraj Raja# By default, disable trace filter control register access to lower non-secure 64*f5211420SGovindraj Raja# exception levels, i.e. NS-EL2, or NS-EL1 if NS-EL2 is implemented, but 65*f5211420SGovindraj Raja# trace filter control register access is unused if FEAT_TRF is implemented. 66*f5211420SGovindraj RajaENABLE_TRF_FOR_NS := 0 67*f5211420SGovindraj Raja 68*f5211420SGovindraj Raja# Flag to enable Data Independent Timing instructions. 69*f5211420SGovindraj RajaENABLE_FEAT_DIT := 0 70*f5211420SGovindraj Raja 71*f5211420SGovindraj Raja#---- 72*f5211420SGovindraj Raja# 8.5 73*f5211420SGovindraj Raja#---- 74*f5211420SGovindraj Raja 75*f5211420SGovindraj Raja# Flag to enable access to the Random Number Generator registers. 76*f5211420SGovindraj RajaENABLE_FEAT_RNG := 0 77*f5211420SGovindraj Raja 78*f5211420SGovindraj Raja# Flag to enable Speculation Barrier Instruction. 79*f5211420SGovindraj RajaENABLE_FEAT_SB := 0 80*f5211420SGovindraj Raja 81*f5211420SGovindraj Raja# Flag to enable Branch Target Identification. 82*f5211420SGovindraj Raja# Internal flag not meant for direct setting. 83*f5211420SGovindraj Raja# Use BRANCH_PROTECTION to enable BTI. 84*f5211420SGovindraj RajaENABLE_BTI := 0 85*f5211420SGovindraj Raja 86*f5211420SGovindraj Raja#---- 87*f5211420SGovindraj Raja# 8.6 88*f5211420SGovindraj Raja#---- 89*f5211420SGovindraj Raja 90*f5211420SGovindraj Raja# Flag to enable access to the CNTPOFF_EL2 register. 91*f5211420SGovindraj RajaENABLE_FEAT_ECV := 0 92*f5211420SGovindraj Raja 93*f5211420SGovindraj Raja# Flag to enable access to the HDFGRTR_EL2 register. 94*f5211420SGovindraj RajaENABLE_FEAT_FGT := 0 95*f5211420SGovindraj Raja 96*f5211420SGovindraj Raja#---- 97*f5211420SGovindraj Raja# 8.7 98*f5211420SGovindraj Raja#---- 99*f5211420SGovindraj Raja 100*f5211420SGovindraj Raja# Flag to enable access to the HCRX_EL2 register by setting SCR_EL3.HXEn. 101*f5211420SGovindraj RajaENABLE_FEAT_HCX := 0 102*f5211420SGovindraj Raja 103*f5211420SGovindraj Raja#---- 104*f5211420SGovindraj Raja# 8.9 105*f5211420SGovindraj Raja#---- 106*f5211420SGovindraj Raja 107*f5211420SGovindraj Raja# Flag to enable access to TCR2 (FEAT_TCR2). 108*f5211420SGovindraj RajaENABLE_FEAT_TCR2 := 0 109*f5211420SGovindraj Raja 110*f5211420SGovindraj Raja# 111*f5211420SGovindraj Raja################################################################################ 112*f5211420SGovindraj Raja# Enable Mandatory features based on Arch versions. 113*f5211420SGovindraj Raja################################################################################ 114*f5211420SGovindraj Raja# 1156a0da736SJayanth Dodderi Chidanand 1166a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.1 and upwards. 1176a0da736SJayanth Dodderi Chidanandifeq "8.1" "$(word 1, $(sort 8.1 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 118*f5211420SGovindraj RajaENABLE_FEAT_PAN := 1 119*f5211420SGovindraj RajaENABLE_FEAT_VHE := 1 1206a0da736SJayanth Dodderi Chidanandendif 1216a0da736SJayanth Dodderi Chidanand 1229202d519SManish Pandey# Enable the features which are mandatory from ARCH version 8.2 and upwards. 1239202d519SManish Pandeyifeq "8.2" "$(word 1, $(sort 8.2 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 124*f5211420SGovindraj RajaENABLE_FEAT_RAS := 1 1259202d519SManish Pandeyendif 1269202d519SManish Pandey 1276a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.4 and upwards. 1286a0da736SJayanth Dodderi Chidanandifeq "8.4" "$(word 1, $(sort 8.4 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 129*f5211420SGovindraj RajaENABLE_FEAT_SEL2 := 1 130*f5211420SGovindraj RajaCTX_INCLUDE_NEVE_REGS := 1 131*f5211420SGovindraj RajaENABLE_TRF_FOR_NS := 1 132*f5211420SGovindraj RajaENABLE_FEAT_DIT := 1 1336a0da736SJayanth Dodderi Chidanandendif 1346a0da736SJayanth Dodderi Chidanand 1356a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.5 and upwards. 1366a0da736SJayanth Dodderi Chidanandifeq "8.5" "$(word 1, $(sort 8.5 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 137*f5211420SGovindraj RajaENABLE_FEAT_RNG := 1 138*f5211420SGovindraj RajaENABLE_FEAT_SB := 1 139*f5211420SGovindraj Raja 140*f5211420SGovindraj Raja# Enable Memory tagging, Branch Target Identification for aarch64 only. 141*f5211420SGovindraj Rajaifeq ($(ARCH), aarch64) 142*f5211420SGovindraj Raja mem_tag_arch_support := yes 143*f5211420SGovindraj Rajaendif #(ARCH=aarch64) 144*f5211420SGovindraj Raja 1456a0da736SJayanth Dodderi Chidanandendif 1466a0da736SJayanth Dodderi Chidanand 1476a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.6 and upwards. 1486a0da736SJayanth Dodderi Chidanandifeq "8.6" "$(word 1, $(sort 8.6 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 149*f5211420SGovindraj RajaENABLE_FEAT_ECV := 1 150*f5211420SGovindraj RajaENABLE_FEAT_FGT := 1 1516a0da736SJayanth Dodderi Chidanandendif 1526a0da736SJayanth Dodderi Chidanand 1536a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.7 and upwards. 1546a0da736SJayanth Dodderi Chidanandifeq "8.7" "$(word 1, $(sort 8.7 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 155*f5211420SGovindraj RajaENABLE_FEAT_HCX := 1 1566a0da736SJayanth Dodderi Chidanandendif 157*f5211420SGovindraj Raja 158*f5211420SGovindraj Raja# Enable the features which are mandatory from ARCH version 8.9 and upwards. 159*f5211420SGovindraj Rajaifeq "8.9" "$(word 1, $(sort 8.9 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 160*f5211420SGovindraj RajaENABLE_FEAT_TCR2 := 1 161*f5211420SGovindraj Rajaendif 162*f5211420SGovindraj Raja 163*f5211420SGovindraj Raja# 164*f5211420SGovindraj Raja################################################################################ 165*f5211420SGovindraj Raja# Optional Features defaulted to 0 or 2, if they are not enabled from 166*f5211420SGovindraj Raja# build option. Can also be disabled or enabled by platform if needed. 167*f5211420SGovindraj Raja################################################################################ 168*f5211420SGovindraj Raja# 169*f5211420SGovindraj Raja 170*f5211420SGovindraj Raja#---- 171*f5211420SGovindraj Raja# 8.0 172*f5211420SGovindraj Raja#---- 173*f5211420SGovindraj Raja 174*f5211420SGovindraj Raja# Flag to enable CSV2_2 extension. 175*f5211420SGovindraj RajaENABLE_FEAT_CSV2_2 ?= 0 176*f5211420SGovindraj Raja 177*f5211420SGovindraj Raja# By default, disable access of trace system registers from NS lower 178*f5211420SGovindraj Raja# ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused if 179*f5211420SGovindraj Raja# system register trace is implemented. This feature is available if 180*f5211420SGovindraj Raja# trace unit such as ETMv4.x, This feature is OPTIONAL and is only 181*f5211420SGovindraj Raja# permitted in Armv8 implementations. 182*f5211420SGovindraj RajaENABLE_SYS_REG_TRACE_FOR_NS ?= 0 183*f5211420SGovindraj Raja 184*f5211420SGovindraj Raja#---- 185*f5211420SGovindraj Raja# 8.2 186*f5211420SGovindraj Raja#---- 187*f5211420SGovindraj Raja 188*f5211420SGovindraj Raja# Build option to enable/disable the Statistical Profiling Extension, 189*f5211420SGovindraj Raja# keep it enabled by default for AArch64. 190*f5211420SGovindraj Rajaifeq (${ARCH},aarch64) 191*f5211420SGovindraj Raja ENABLE_SPE_FOR_NS ?= 2 192*f5211420SGovindraj Rajaelse ifeq (${ARCH},aarch32) 193*f5211420SGovindraj Raja ifdef ENABLE_SPE_FOR_NS 194*f5211420SGovindraj Raja $(error ENABLE_SPE_FOR_NS is not supported for AArch32) 195*f5211420SGovindraj Raja else 196*f5211420SGovindraj Raja ENABLE_SPE_FOR_NS := 0 197*f5211420SGovindraj Raja endif 198*f5211420SGovindraj Rajaendif 199*f5211420SGovindraj Raja 200*f5211420SGovindraj Raja# Enable SVE for non-secure world by default. 201*f5211420SGovindraj Rajaifeq (${ARCH},aarch64) 202*f5211420SGovindraj Raja ENABLE_SVE_FOR_NS ?= 2 203*f5211420SGovindraj Raja# SVE is only supported on AArch64 so disable it on AArch32. 204*f5211420SGovindraj Rajaelse ifeq (${ARCH},aarch32) 205*f5211420SGovindraj Raja ifdef ENABLE_SVE_FOR_NS 206*f5211420SGovindraj Raja $(error ENABLE_SVE_FOR_NS is not supported for AArch32) 207*f5211420SGovindraj Raja else 208*f5211420SGovindraj Raja ENABLE_SVE_FOR_NS := 0 209*f5211420SGovindraj Raja endif 210*f5211420SGovindraj Rajaendif 211*f5211420SGovindraj Raja 212*f5211420SGovindraj Raja#---- 213*f5211420SGovindraj Raja# 8.4 214*f5211420SGovindraj Raja#---- 215*f5211420SGovindraj Raja 216*f5211420SGovindraj Raja# Feature flags for supporting Activity monitor extensions. 217*f5211420SGovindraj RajaENABLE_FEAT_AMU ?= 0 218*f5211420SGovindraj RajaENABLE_AMU_AUXILIARY_COUNTERS ?= 0 219*f5211420SGovindraj RajaENABLE_AMU_FCONF ?= 0 220*f5211420SGovindraj RajaAMU_RESTRICT_COUNTERS ?= 0 221*f5211420SGovindraj Raja 222*f5211420SGovindraj Raja# Build option to enable MPAM for lower ELs. 223*f5211420SGovindraj RajaENABLE_MPAM_FOR_LOWER_ELS ?= 0 224*f5211420SGovindraj Raja 225*f5211420SGovindraj Raja#---- 226*f5211420SGovindraj Raja# 8.5 227*f5211420SGovindraj Raja#---- 228*f5211420SGovindraj Raja 229*f5211420SGovindraj Raja# Flag to enable support for EL3 trapping of reads of the RNDR and RNDRRS 230*f5211420SGovindraj Raja# registers, by setting SCR_EL3.TRNDR. 231*f5211420SGovindraj RajaENABLE_FEAT_RNG_TRAP ?= 0 232*f5211420SGovindraj Raja 233*f5211420SGovindraj Raja# Include Memory Tagging Extension registers in cpu context. This must be set 234*f5211420SGovindraj Raja# to 1 if the platform wants to use this feature in the Secure world and MTE is 235*f5211420SGovindraj Raja# enabled at ELX. 236*f5211420SGovindraj RajaCTX_INCLUDE_MTE_REGS ?= 0 237*f5211420SGovindraj Raja 238*f5211420SGovindraj Raja#---- 239*f5211420SGovindraj Raja# 8.6 240*f5211420SGovindraj Raja#---- 241*f5211420SGovindraj Raja 242*f5211420SGovindraj Raja# Flag to enable AMUv1p1 extension. 243*f5211420SGovindraj RajaENABLE_FEAT_AMUv1p1 ?= 0 244*f5211420SGovindraj Raja 245*f5211420SGovindraj Raja# Flag to enable delayed trapping of WFE instruction (FEAT_TWED). 246*f5211420SGovindraj RajaENABLE_FEAT_TWED ?= 0 247*f5211420SGovindraj Raja 248*f5211420SGovindraj Raja# In v8.6+ platforms with delayed trapping of WFE being supported 249*f5211420SGovindraj Raja# via FEAT_TWED, this flag takes the delay value to be set in the 250*f5211420SGovindraj Raja# SCR_EL3.TWEDEL(4bit) field, when FEAT_TWED is implemented. 251*f5211420SGovindraj Raja# By default it takes 0, and need to be updated by the platforms. 252*f5211420SGovindraj RajaTWED_DELAY ?= 0 253*f5211420SGovindraj Raja 254*f5211420SGovindraj Raja# Disable MTPMU if FEAT_MTPMU is supported. 255*f5211420SGovindraj RajaDISABLE_MTPMU ?= 0 256*f5211420SGovindraj Raja 257*f5211420SGovindraj Raja#---- 258*f5211420SGovindraj Raja# 8.9 259*f5211420SGovindraj Raja#---- 260*f5211420SGovindraj Raja 261*f5211420SGovindraj Raja# Flag to enable NoTagAccess memory region attribute for stage 2 of translation. 262*f5211420SGovindraj RajaENABLE_FEAT_MTE_PERM ?= 0 263*f5211420SGovindraj Raja 264*f5211420SGovindraj Raja# Flag to enable access to Stage 2 Permission Indirection (FEAT_S2PIE). 265*f5211420SGovindraj RajaENABLE_FEAT_S2PIE ?= 0 266*f5211420SGovindraj Raja 267*f5211420SGovindraj Raja# Flag to enable access to Stage 1 Permission Indirection (FEAT_S1PIE). 268*f5211420SGovindraj RajaENABLE_FEAT_S1PIE ?= 0 269*f5211420SGovindraj Raja 270*f5211420SGovindraj Raja# Flag to enable access to Stage 2 Permission Overlay (FEAT_S2POE). 271*f5211420SGovindraj RajaENABLE_FEAT_S2POE ?= 0 272*f5211420SGovindraj Raja 273*f5211420SGovindraj Raja# Flag to enable access to Stage 1 Permission Overlay (FEAT_S1POE). 274*f5211420SGovindraj RajaENABLE_FEAT_S1POE ?= 0 275*f5211420SGovindraj Raja 276*f5211420SGovindraj Raja#---- 277*f5211420SGovindraj Raja# 9.0 278*f5211420SGovindraj Raja#---- 279*f5211420SGovindraj Raja 280*f5211420SGovindraj Raja# Flag to enable Realm Management Extension (FEAT_RME). 281*f5211420SGovindraj RajaENABLE_RME ?= 0 282*f5211420SGovindraj Raja 283*f5211420SGovindraj Raja# Scalable Matrix Extension for non-secure world. 284*f5211420SGovindraj RajaENABLE_SME_FOR_NS ?= 0 285*f5211420SGovindraj Raja 286*f5211420SGovindraj Raja# Scalable Vector Extension for secure world. 287*f5211420SGovindraj RajaENABLE_SVE_FOR_SWD ?= 0 288*f5211420SGovindraj Raja 289*f5211420SGovindraj Raja# By default, disable access of trace buffer control registers from NS 290*f5211420SGovindraj Raja# lower ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused 291*f5211420SGovindraj Raja# if FEAT_TRBE is implemented. 292*f5211420SGovindraj Raja# Note FEAT_TRBE is only supported on AArch64 - therefore do not enable in 293*f5211420SGovindraj Raja# AArch32. 294*f5211420SGovindraj Rajaifeq (${ARCH},aarch64) 295*f5211420SGovindraj Raja ENABLE_TRBE_FOR_NS ?= 0 296*f5211420SGovindraj Rajaelse ifeq (${ARCH},aarch32) 297*f5211420SGovindraj Raja ifdef ENABLE_TRBE_FOR_NS 298*f5211420SGovindraj Raja $(error ENABLE_TRBE_FOR_NS is not supported for AArch32) 299*f5211420SGovindraj Raja else 300*f5211420SGovindraj Raja ENABLE_TRBE_FOR_NS := 0 301*f5211420SGovindraj Raja endif 302*f5211420SGovindraj Rajaendif 303*f5211420SGovindraj Raja 304*f5211420SGovindraj Raja#---- 305*f5211420SGovindraj Raja# 9.2 306*f5211420SGovindraj Raja#---- 307*f5211420SGovindraj Raja 308*f5211420SGovindraj Raja# Scalable Matrix Extension version 2 for non-secure world. 309*f5211420SGovindraj RajaENABLE_SME2_FOR_NS ?= 0 310*f5211420SGovindraj Raja 311*f5211420SGovindraj Raja# Scalable Matrix Extension for secure world. 312*f5211420SGovindraj RajaENABLE_SME_FOR_SWD ?= 0 313*f5211420SGovindraj Raja 314*f5211420SGovindraj Raja# By default, disable access to branch record buffer control registers from NS 315*f5211420SGovindraj Raja# lower ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused 316*f5211420SGovindraj Raja# if FEAT_BRBE is implemented. 317*f5211420SGovindraj RajaENABLE_BRBE_FOR_NS ?= 0 318*f5211420SGovindraj Raja 319*f5211420SGovindraj Raja#---- 320*f5211420SGovindraj Raja#9.4 321*f5211420SGovindraj Raja#---- 322*f5211420SGovindraj Raja 323*f5211420SGovindraj Raja# Flag to enable access to Guarded Control Stack (FEAT_GCS). 324*f5211420SGovindraj RajaENABLE_FEAT_GCS ?= 0 325