16a0da736SJayanth Dodderi Chidanand# 2f5211420SGovindraj Raja# Copyright (c) 2022-2023, Arm Limited. All rights reserved. 36a0da736SJayanth Dodderi Chidanand# 46a0da736SJayanth Dodderi Chidanand# SPDX-License-Identifier: BSD-3-Clause 56a0da736SJayanth Dodderi Chidanand# 66a0da736SJayanth Dodderi Chidanand 7f5211420SGovindraj Raja# This file lists all of the architectural features, and initializes 8f5211420SGovindraj Raja# and enables them based on the configured architecture version. 9f5211420SGovindraj Raja 10f5211420SGovindraj Raja# This file follows the following format: 11f5211420SGovindraj Raja# - By default disable any mandatory features. 12f5211420SGovindraj Raja# - Then Enable mandatory feature if applicable to an Arch Version. 13f5211420SGovindraj Raja# - Disable or enable any optional feature this would be enabled/disabled if needed by platform. 14f5211420SGovindraj Raja 15f5211420SGovindraj Raja# 16f5211420SGovindraj Raja################################################################################ 17f5211420SGovindraj Raja# Set mandatory features by default to zero. 18f5211420SGovindraj Raja################################################################################ 19f5211420SGovindraj Raja# 20f5211420SGovindraj Raja 21f5211420SGovindraj Raja#---- 22f5211420SGovindraj Raja# 8.1 23f5211420SGovindraj Raja#---- 24f5211420SGovindraj Raja 25f5211420SGovindraj Raja# Flag to enable access to Privileged Access Never bit of PSTATE. 26f5211420SGovindraj RajaENABLE_FEAT_PAN := 0 27f5211420SGovindraj Raja 28f5211420SGovindraj Raja# Flag to enable Virtualization Host Extensions. 29f5211420SGovindraj RajaENABLE_FEAT_VHE := 0 30f5211420SGovindraj Raja 31f5211420SGovindraj Raja#---- 32f5211420SGovindraj Raja# 8.2 33f5211420SGovindraj Raja#---- 34f5211420SGovindraj Raja 35f5211420SGovindraj Raja# Enable RAS Support. 36f5211420SGovindraj RajaENABLE_FEAT_RAS := 0 37f5211420SGovindraj Raja 38f5211420SGovindraj Raja#---- 39f5211420SGovindraj Raja# 8.3 40f5211420SGovindraj Raja#---- 41f5211420SGovindraj Raja 42f5211420SGovindraj Raja# Flag to enable Pointer Authentication. Internal flag not meant for 43f5211420SGovindraj Raja# direct setting. Use BRANCH_PROTECTION to enable PAUTH. 44f5211420SGovindraj RajaENABLE_PAUTH := 0 45f5211420SGovindraj Raja 46f5211420SGovindraj Raja# Include pointer authentication (ARMv8.3-PAuth) registers in cpu context. This 47f5211420SGovindraj Raja# must be set to 1 if the platform wants to use this feature in the Secure 48f5211420SGovindraj Raja# world. It is not necessary for use in the Non-secure world. 49f5211420SGovindraj RajaCTX_INCLUDE_PAUTH_REGS := 0 50f5211420SGovindraj Raja 51f5211420SGovindraj Raja#---- 52f5211420SGovindraj Raja# 8.4 53f5211420SGovindraj Raja#---- 54f5211420SGovindraj Raja 55f5211420SGovindraj Raja# Flag to enable Secure EL-2 feature. 56f5211420SGovindraj RajaENABLE_FEAT_SEL2 := 0 57f5211420SGovindraj Raja 58f5211420SGovindraj Raja# By default, disable trace filter control register access to lower non-secure 59f5211420SGovindraj Raja# exception levels, i.e. NS-EL2, or NS-EL1 if NS-EL2 is implemented, but 60f5211420SGovindraj Raja# trace filter control register access is unused if FEAT_TRF is implemented. 61f5211420SGovindraj RajaENABLE_TRF_FOR_NS := 0 62f5211420SGovindraj Raja 63f5211420SGovindraj Raja# Flag to enable Data Independent Timing instructions. 64f5211420SGovindraj RajaENABLE_FEAT_DIT := 0 65f5211420SGovindraj Raja 66f5211420SGovindraj Raja#---- 67f5211420SGovindraj Raja# 8.5 68f5211420SGovindraj Raja#---- 69f5211420SGovindraj Raja 70f5211420SGovindraj Raja# Flag to enable access to the Random Number Generator registers. 71f5211420SGovindraj RajaENABLE_FEAT_RNG := 0 72f5211420SGovindraj Raja 73f5211420SGovindraj Raja# Flag to enable Speculation Barrier Instruction. 74f5211420SGovindraj RajaENABLE_FEAT_SB := 0 75f5211420SGovindraj Raja 76f5211420SGovindraj Raja# Flag to enable Branch Target Identification. 77f5211420SGovindraj Raja# Internal flag not meant for direct setting. 78f5211420SGovindraj Raja# Use BRANCH_PROTECTION to enable BTI. 79f5211420SGovindraj RajaENABLE_BTI := 0 80f5211420SGovindraj Raja 81f5211420SGovindraj Raja#---- 82f5211420SGovindraj Raja# 8.6 83f5211420SGovindraj Raja#---- 84f5211420SGovindraj Raja 85f5211420SGovindraj Raja# Flag to enable access to the CNTPOFF_EL2 register. 86f5211420SGovindraj RajaENABLE_FEAT_ECV := 0 87f5211420SGovindraj Raja 88f5211420SGovindraj Raja# Flag to enable access to the HDFGRTR_EL2 register. 89f5211420SGovindraj RajaENABLE_FEAT_FGT := 0 90f5211420SGovindraj Raja 91f5211420SGovindraj Raja#---- 92f5211420SGovindraj Raja# 8.7 93f5211420SGovindraj Raja#---- 94f5211420SGovindraj Raja 95f5211420SGovindraj Raja# Flag to enable access to the HCRX_EL2 register by setting SCR_EL3.HXEn. 96f5211420SGovindraj RajaENABLE_FEAT_HCX := 0 97f5211420SGovindraj Raja 98f5211420SGovindraj Raja#---- 99f5211420SGovindraj Raja# 8.9 100f5211420SGovindraj Raja#---- 101f5211420SGovindraj Raja 102f5211420SGovindraj Raja# Flag to enable access to TCR2 (FEAT_TCR2). 103f5211420SGovindraj RajaENABLE_FEAT_TCR2 := 0 104f5211420SGovindraj Raja 105f5211420SGovindraj Raja# 106f5211420SGovindraj Raja################################################################################ 107f5211420SGovindraj Raja# Enable Mandatory features based on Arch versions. 108f5211420SGovindraj Raja################################################################################ 109f5211420SGovindraj Raja# 1106a0da736SJayanth Dodderi Chidanand 1116a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.1 and upwards. 1126a0da736SJayanth Dodderi Chidanandifeq "8.1" "$(word 1, $(sort 8.1 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 113f5211420SGovindraj RajaENABLE_FEAT_PAN := 1 114f5211420SGovindraj RajaENABLE_FEAT_VHE := 1 1156a0da736SJayanth Dodderi Chidanandendif 1166a0da736SJayanth Dodderi Chidanand 1179202d519SManish Pandey# Enable the features which are mandatory from ARCH version 8.2 and upwards. 1189202d519SManish Pandeyifeq "8.2" "$(word 1, $(sort 8.2 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 119f5211420SGovindraj RajaENABLE_FEAT_RAS := 1 1209202d519SManish Pandeyendif 1219202d519SManish Pandey 1226a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.4 and upwards. 1236a0da736SJayanth Dodderi Chidanandifeq "8.4" "$(word 1, $(sort 8.4 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 124f5211420SGovindraj RajaENABLE_FEAT_SEL2 := 1 125f5211420SGovindraj RajaENABLE_TRF_FOR_NS := 1 126f5211420SGovindraj RajaENABLE_FEAT_DIT := 1 1276a0da736SJayanth Dodderi Chidanandendif 1286a0da736SJayanth Dodderi Chidanand 1296a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.5 and upwards. 1306a0da736SJayanth Dodderi Chidanandifeq "8.5" "$(word 1, $(sort 8.5 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 131f5211420SGovindraj RajaENABLE_FEAT_RNG := 1 132f5211420SGovindraj RajaENABLE_FEAT_SB := 1 133f5211420SGovindraj Raja 134f5211420SGovindraj Raja# Enable Memory tagging, Branch Target Identification for aarch64 only. 135f5211420SGovindraj Rajaifeq ($(ARCH), aarch64) 136f5211420SGovindraj Raja mem_tag_arch_support := yes 137f5211420SGovindraj Rajaendif #(ARCH=aarch64) 138f5211420SGovindraj Raja 1396a0da736SJayanth Dodderi Chidanandendif 1406a0da736SJayanth Dodderi Chidanand 1416a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.6 and upwards. 1426a0da736SJayanth Dodderi Chidanandifeq "8.6" "$(word 1, $(sort 8.6 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 143f5211420SGovindraj RajaENABLE_FEAT_ECV := 1 144f5211420SGovindraj RajaENABLE_FEAT_FGT := 1 1456a0da736SJayanth Dodderi Chidanandendif 1466a0da736SJayanth Dodderi Chidanand 1476a0da736SJayanth Dodderi Chidanand# Enable the features which are mandatory from ARCH version 8.7 and upwards. 1486a0da736SJayanth Dodderi Chidanandifeq "8.7" "$(word 1, $(sort 8.7 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 149f5211420SGovindraj RajaENABLE_FEAT_HCX := 1 1506a0da736SJayanth Dodderi Chidanandendif 151f5211420SGovindraj Raja 152f5211420SGovindraj Raja# Enable the features which are mandatory from ARCH version 8.9 and upwards. 153f5211420SGovindraj Rajaifeq "8.9" "$(word 1, $(sort 8.9 $(ARM_ARCH_MAJOR).$(ARM_ARCH_MINOR)))" 154f5211420SGovindraj RajaENABLE_FEAT_TCR2 := 1 155f5211420SGovindraj Rajaendif 156f5211420SGovindraj Raja 157f5211420SGovindraj Raja# 158f5211420SGovindraj Raja################################################################################ 159f5211420SGovindraj Raja# Optional Features defaulted to 0 or 2, if they are not enabled from 160f5211420SGovindraj Raja# build option. Can also be disabled or enabled by platform if needed. 161f5211420SGovindraj Raja################################################################################ 162f5211420SGovindraj Raja# 163f5211420SGovindraj Raja 164f5211420SGovindraj Raja#---- 165f5211420SGovindraj Raja# 8.0 166f5211420SGovindraj Raja#---- 167f5211420SGovindraj Raja 168f5211420SGovindraj Raja# Flag to enable CSV2_2 extension. 169f5211420SGovindraj RajaENABLE_FEAT_CSV2_2 ?= 0 170f5211420SGovindraj Raja 171f5211420SGovindraj Raja# By default, disable access of trace system registers from NS lower 172f5211420SGovindraj Raja# ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused if 173f5211420SGovindraj Raja# system register trace is implemented. This feature is available if 174f5211420SGovindraj Raja# trace unit such as ETMv4.x, This feature is OPTIONAL and is only 175f5211420SGovindraj Raja# permitted in Armv8 implementations. 176f5211420SGovindraj RajaENABLE_SYS_REG_TRACE_FOR_NS ?= 0 177f5211420SGovindraj Raja 178f5211420SGovindraj Raja#---- 179f5211420SGovindraj Raja# 8.2 180f5211420SGovindraj Raja#---- 181f5211420SGovindraj Raja 182f5211420SGovindraj Raja# Build option to enable/disable the Statistical Profiling Extension, 183f5211420SGovindraj Raja# keep it enabled by default for AArch64. 184f5211420SGovindraj Rajaifeq (${ARCH},aarch64) 185f5211420SGovindraj Raja ENABLE_SPE_FOR_NS ?= 2 186f5211420SGovindraj Rajaelse ifeq (${ARCH},aarch32) 187f5211420SGovindraj Raja ifdef ENABLE_SPE_FOR_NS 188f5211420SGovindraj Raja $(error ENABLE_SPE_FOR_NS is not supported for AArch32) 189f5211420SGovindraj Raja else 190f5211420SGovindraj Raja ENABLE_SPE_FOR_NS := 0 191f5211420SGovindraj Raja endif 192f5211420SGovindraj Rajaendif 193f5211420SGovindraj Raja 194f5211420SGovindraj Raja# Enable SVE for non-secure world by default. 195f5211420SGovindraj Rajaifeq (${ARCH},aarch64) 196f5211420SGovindraj Raja ENABLE_SVE_FOR_NS ?= 2 197f5211420SGovindraj Raja# SVE is only supported on AArch64 so disable it on AArch32. 198f5211420SGovindraj Rajaelse ifeq (${ARCH},aarch32) 199f5211420SGovindraj Raja ifdef ENABLE_SVE_FOR_NS 200f5211420SGovindraj Raja $(error ENABLE_SVE_FOR_NS is not supported for AArch32) 201f5211420SGovindraj Raja else 202f5211420SGovindraj Raja ENABLE_SVE_FOR_NS := 0 203f5211420SGovindraj Raja endif 204f5211420SGovindraj Rajaendif 205f5211420SGovindraj Raja 206f5211420SGovindraj Raja#---- 207f5211420SGovindraj Raja# 8.4 208f5211420SGovindraj Raja#---- 209f5211420SGovindraj Raja 210f5211420SGovindraj Raja# Feature flags for supporting Activity monitor extensions. 211f5211420SGovindraj RajaENABLE_FEAT_AMU ?= 0 212f5211420SGovindraj RajaENABLE_AMU_AUXILIARY_COUNTERS ?= 0 213f5211420SGovindraj RajaENABLE_AMU_FCONF ?= 0 214f5211420SGovindraj RajaAMU_RESTRICT_COUNTERS ?= 0 215f5211420SGovindraj Raja 216f5211420SGovindraj Raja# Build option to enable MPAM for lower ELs. 217f5211420SGovindraj RajaENABLE_MPAM_FOR_LOWER_ELS ?= 0 218f5211420SGovindraj Raja 219*8b2048c1SGovindraj Raja# Include nested virtualization control (Armv8.4-NV) registers in cpu context. 220*8b2048c1SGovindraj Raja# This must be set to 1 if architecture implements Nested Virtualization 221*8b2048c1SGovindraj Raja# Extension and platform wants to use this feature in the Secure world. 222*8b2048c1SGovindraj RajaCTX_INCLUDE_NEVE_REGS ?= 0 223*8b2048c1SGovindraj Raja 224f5211420SGovindraj Raja#---- 225f5211420SGovindraj Raja# 8.5 226f5211420SGovindraj Raja#---- 227f5211420SGovindraj Raja 228f5211420SGovindraj Raja# Flag to enable support for EL3 trapping of reads of the RNDR and RNDRRS 229f5211420SGovindraj Raja# registers, by setting SCR_EL3.TRNDR. 230f5211420SGovindraj RajaENABLE_FEAT_RNG_TRAP ?= 0 231f5211420SGovindraj Raja 232f5211420SGovindraj Raja# Include Memory Tagging Extension registers in cpu context. This must be set 233f5211420SGovindraj Raja# to 1 if the platform wants to use this feature in the Secure world and MTE is 234f5211420SGovindraj Raja# enabled at ELX. 235f5211420SGovindraj RajaCTX_INCLUDE_MTE_REGS ?= 0 236f5211420SGovindraj Raja 237f5211420SGovindraj Raja#---- 238f5211420SGovindraj Raja# 8.6 239f5211420SGovindraj Raja#---- 240f5211420SGovindraj Raja 241f5211420SGovindraj Raja# Flag to enable AMUv1p1 extension. 242f5211420SGovindraj RajaENABLE_FEAT_AMUv1p1 ?= 0 243f5211420SGovindraj Raja 244f5211420SGovindraj Raja# Flag to enable delayed trapping of WFE instruction (FEAT_TWED). 245f5211420SGovindraj RajaENABLE_FEAT_TWED ?= 0 246f5211420SGovindraj Raja 247f5211420SGovindraj Raja# In v8.6+ platforms with delayed trapping of WFE being supported 248f5211420SGovindraj Raja# via FEAT_TWED, this flag takes the delay value to be set in the 249f5211420SGovindraj Raja# SCR_EL3.TWEDEL(4bit) field, when FEAT_TWED is implemented. 250f5211420SGovindraj Raja# By default it takes 0, and need to be updated by the platforms. 251f5211420SGovindraj RajaTWED_DELAY ?= 0 252f5211420SGovindraj Raja 253f5211420SGovindraj Raja# Disable MTPMU if FEAT_MTPMU is supported. 254f5211420SGovindraj RajaDISABLE_MTPMU ?= 0 255f5211420SGovindraj Raja 256f5211420SGovindraj Raja#---- 257f5211420SGovindraj Raja# 8.9 258f5211420SGovindraj Raja#---- 259f5211420SGovindraj Raja 260f5211420SGovindraj Raja# Flag to enable NoTagAccess memory region attribute for stage 2 of translation. 261f5211420SGovindraj RajaENABLE_FEAT_MTE_PERM ?= 0 262f5211420SGovindraj Raja 263f5211420SGovindraj Raja# Flag to enable access to Stage 2 Permission Indirection (FEAT_S2PIE). 264f5211420SGovindraj RajaENABLE_FEAT_S2PIE ?= 0 265f5211420SGovindraj Raja 266f5211420SGovindraj Raja# Flag to enable access to Stage 1 Permission Indirection (FEAT_S1PIE). 267f5211420SGovindraj RajaENABLE_FEAT_S1PIE ?= 0 268f5211420SGovindraj Raja 269f5211420SGovindraj Raja# Flag to enable access to Stage 2 Permission Overlay (FEAT_S2POE). 270f5211420SGovindraj RajaENABLE_FEAT_S2POE ?= 0 271f5211420SGovindraj Raja 272f5211420SGovindraj Raja# Flag to enable access to Stage 1 Permission Overlay (FEAT_S1POE). 273f5211420SGovindraj RajaENABLE_FEAT_S1POE ?= 0 274f5211420SGovindraj Raja 275f5211420SGovindraj Raja#---- 276f5211420SGovindraj Raja# 9.0 277f5211420SGovindraj Raja#---- 278f5211420SGovindraj Raja 279f5211420SGovindraj Raja# Flag to enable Realm Management Extension (FEAT_RME). 280f5211420SGovindraj RajaENABLE_RME ?= 0 281f5211420SGovindraj Raja 282f5211420SGovindraj Raja# Scalable Matrix Extension for non-secure world. 283f5211420SGovindraj RajaENABLE_SME_FOR_NS ?= 0 284f5211420SGovindraj Raja 285f5211420SGovindraj Raja# Scalable Vector Extension for secure world. 286f5211420SGovindraj RajaENABLE_SVE_FOR_SWD ?= 0 287f5211420SGovindraj Raja 288f5211420SGovindraj Raja# By default, disable access of trace buffer control registers from NS 289f5211420SGovindraj Raja# lower ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused 290f5211420SGovindraj Raja# if FEAT_TRBE is implemented. 291f5211420SGovindraj Raja# Note FEAT_TRBE is only supported on AArch64 - therefore do not enable in 292f5211420SGovindraj Raja# AArch32. 293f5211420SGovindraj Rajaifeq (${ARCH},aarch64) 294f5211420SGovindraj Raja ENABLE_TRBE_FOR_NS ?= 0 295f5211420SGovindraj Rajaelse ifeq (${ARCH},aarch32) 296f5211420SGovindraj Raja ifdef ENABLE_TRBE_FOR_NS 297f5211420SGovindraj Raja $(error ENABLE_TRBE_FOR_NS is not supported for AArch32) 298f5211420SGovindraj Raja else 299f5211420SGovindraj Raja ENABLE_TRBE_FOR_NS := 0 300f5211420SGovindraj Raja endif 301f5211420SGovindraj Rajaendif 302f5211420SGovindraj Raja 303f5211420SGovindraj Raja#---- 304f5211420SGovindraj Raja# 9.2 305f5211420SGovindraj Raja#---- 306f5211420SGovindraj Raja 307f5211420SGovindraj Raja# Scalable Matrix Extension version 2 for non-secure world. 308f5211420SGovindraj RajaENABLE_SME2_FOR_NS ?= 0 309f5211420SGovindraj Raja 310f5211420SGovindraj Raja# Scalable Matrix Extension for secure world. 311f5211420SGovindraj RajaENABLE_SME_FOR_SWD ?= 0 312f5211420SGovindraj Raja 313f5211420SGovindraj Raja# By default, disable access to branch record buffer control registers from NS 314f5211420SGovindraj Raja# lower ELs i.e. NS-EL2, or NS-EL1 if NS-EL2 implemented but unused 315f5211420SGovindraj Raja# if FEAT_BRBE is implemented. 316f5211420SGovindraj RajaENABLE_BRBE_FOR_NS ?= 0 317f5211420SGovindraj Raja 318f5211420SGovindraj Raja#---- 319f5211420SGovindraj Raja#9.4 320f5211420SGovindraj Raja#---- 321f5211420SGovindraj Raja 322f5211420SGovindraj Raja# Flag to enable access to Guarded Control Stack (FEAT_GCS). 323f5211420SGovindraj RajaENABLE_FEAT_GCS ?= 0 324