1 /* 2 * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef XLAT_TABLES_PRIVATE_H 8 #define XLAT_TABLES_PRIVATE_H 9 10 #include <platform_def.h> 11 #include <stdbool.h> 12 #include <xlat_tables_defs.h> 13 14 #if PLAT_XLAT_TABLES_DYNAMIC 15 /* 16 * Private shifts and masks to access fields of an mmap attribute 17 */ 18 /* Dynamic or static */ 19 #define MT_DYN_SHIFT U(31) 20 21 /* 22 * Memory mapping private attributes 23 * 24 * Private attributes not exposed in the public header. 25 */ 26 27 /* 28 * Regions mapped before the MMU can't be unmapped dynamically (they are 29 * static) and regions mapped with MMU enabled can be unmapped. This 30 * behaviour can't be overridden. 31 * 32 * Static regions can overlap each other, dynamic regions can't. 33 */ 34 #define MT_STATIC (U(0) << MT_DYN_SHIFT) 35 #define MT_DYNAMIC (U(1) << MT_DYN_SHIFT) 36 37 #endif /* PLAT_XLAT_TABLES_DYNAMIC */ 38 39 extern uint64_t mmu_cfg_params[MMU_CFG_PARAM_MAX]; 40 41 /* 42 * Return the execute-never mask that will prevent instruction fetch at the 43 * given translation regime. 44 */ 45 uint64_t xlat_arch_regime_get_xn_desc(int xlat_regime); 46 47 /* 48 * Invalidate all TLB entries that match the given virtual address. This 49 * operation applies to all PEs in the same Inner Shareable domain as the PE 50 * that executes this function. This functions must be called for every 51 * translation table entry that is modified. It only affects the specified 52 * translation regime. 53 * 54 * Note, however, that it is architecturally UNDEFINED to invalidate TLB entries 55 * pertaining to a higher exception level, e.g. invalidating EL3 entries from 56 * S-EL1. 57 */ 58 void xlat_arch_tlbi_va(uintptr_t va, int xlat_regime); 59 60 /* 61 * This function has to be called at the end of any code that uses the function 62 * xlat_arch_tlbi_va(). 63 */ 64 void xlat_arch_tlbi_va_sync(void); 65 66 /* Print VA, PA, size and attributes of all regions in the mmap array. */ 67 void xlat_mmap_print(const mmap_region_t *mmap); 68 69 /* 70 * Print the current state of the translation tables by reading them from 71 * memory. 72 */ 73 void xlat_tables_print(xlat_ctx_t *ctx); 74 75 /* 76 * Returns a block/page table descriptor for the given level and attributes. 77 */ 78 uint64_t xlat_desc(const xlat_ctx_t *ctx, uint32_t attr, 79 unsigned long long addr_pa, unsigned int level); 80 81 /* 82 * Architecture-specific initialization code. 83 */ 84 85 /* Returns the current Exception Level. The returned EL must be 1 or higher. */ 86 unsigned int xlat_arch_current_el(void); 87 88 /* 89 * Return the maximum physical address supported by the hardware. 90 * This value depends on the execution state (AArch32/AArch64). 91 */ 92 unsigned long long xlat_arch_get_max_supported_pa(void); 93 94 /* 95 * Returns true if the MMU of the translation regime managed by the given 96 * xlat_ctx_t is enabled, false otherwise. 97 */ 98 bool is_mmu_enabled_ctx(const xlat_ctx_t *ctx); 99 100 /* Returns true if the data cache is enabled at the current EL. */ 101 bool is_dcache_enabled(void); 102 103 #endif /* XLAT_TABLES_PRIVATE_H */ 104