17bb01fb2SAntonio Nino Diaz /* 29fb8af33SRoberto Vargas * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 37bb01fb2SAntonio Nino Diaz * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 57bb01fb2SAntonio Nino Diaz */ 67bb01fb2SAntonio Nino Diaz 77bb01fb2SAntonio Nino Diaz #ifndef __XLAT_TABLES_PRIVATE_H__ 87bb01fb2SAntonio Nino Diaz #define __XLAT_TABLES_PRIVATE_H__ 97bb01fb2SAntonio Nino Diaz 107bb01fb2SAntonio Nino Diaz #include <platform_def.h> 118933c34bSSandrine Bailleux #include <xlat_tables_defs.h> 127bb01fb2SAntonio Nino Diaz 130b64f4efSAntonio Nino Diaz #if PLAT_XLAT_TABLES_DYNAMIC 140b64f4efSAntonio Nino Diaz /* 153a1b7b10SAntonio Nino Diaz * Private shifts and masks to access fields of an mmap attribute 160b64f4efSAntonio Nino Diaz */ 170b64f4efSAntonio Nino Diaz /* Dynamic or static */ 183a1b7b10SAntonio Nino Diaz #define MT_DYN_SHIFT U(31) 190b64f4efSAntonio Nino Diaz 200b64f4efSAntonio Nino Diaz /* 210b64f4efSAntonio Nino Diaz * Memory mapping private attributes 220b64f4efSAntonio Nino Diaz * 233a1b7b10SAntonio Nino Diaz * Private attributes not exposed in the public header. 240b64f4efSAntonio Nino Diaz */ 253a1b7b10SAntonio Nino Diaz 260b64f4efSAntonio Nino Diaz /* 270b64f4efSAntonio Nino Diaz * Regions mapped before the MMU can't be unmapped dynamically (they are 280b64f4efSAntonio Nino Diaz * static) and regions mapped with MMU enabled can be unmapped. This 290b64f4efSAntonio Nino Diaz * behaviour can't be overridden. 300b64f4efSAntonio Nino Diaz * 310b64f4efSAntonio Nino Diaz * Static regions can overlap each other, dynamic regions can't. 320b64f4efSAntonio Nino Diaz */ 333a1b7b10SAntonio Nino Diaz #define MT_STATIC (U(0) << MT_DYN_SHIFT) 343a1b7b10SAntonio Nino Diaz #define MT_DYNAMIC (U(1) << MT_DYN_SHIFT) 350b64f4efSAntonio Nino Diaz 36f301da44SSandrine Bailleux #endif /* PLAT_XLAT_TABLES_DYNAMIC */ 37f301da44SSandrine Bailleux 380b64f4efSAntonio Nino Diaz /* 39*468e2382SAntonio Nino Diaz * Return the execute-never mask that will prevent instruction fetch at the 40*468e2382SAntonio Nino Diaz * given translation regime. 41*468e2382SAntonio Nino Diaz */ 42*468e2382SAntonio Nino Diaz uint64_t xlat_arch_regime_get_xn_desc(int xlat_regime); 43*468e2382SAntonio Nino Diaz 44*468e2382SAntonio Nino Diaz /* 45b4ae615bSDouglas Raillard * Invalidate all TLB entries that match the given virtual address. This 46b4ae615bSDouglas Raillard * operation applies to all PEs in the same Inner Shareable domain as the PE 47b4ae615bSDouglas Raillard * that executes this function. This functions must be called for every 48b4ae615bSDouglas Raillard * translation table entry that is modified. 49b4ae615bSDouglas Raillard * 50b4ae615bSDouglas Raillard * xlat_arch_tlbi_va() applies the invalidation to the exception level of the 51b4ae615bSDouglas Raillard * current translation regime, whereas xlat_arch_tlbi_va_regime() applies it to 52b4ae615bSDouglas Raillard * the given translation regime. 53b4ae615bSDouglas Raillard * 54b4ae615bSDouglas Raillard * Note, however, that it is architecturally UNDEFINED to invalidate TLB entries 55b4ae615bSDouglas Raillard * pertaining to a higher exception level, e.g. invalidating EL3 entries from 56b4ae615bSDouglas Raillard * S-EL1. 570b64f4efSAntonio Nino Diaz */ 580b64f4efSAntonio Nino Diaz void xlat_arch_tlbi_va(uintptr_t va); 59fd2299e6SAntonio Nino Diaz void xlat_arch_tlbi_va_regime(uintptr_t va, int xlat_regime); 600b64f4efSAntonio Nino Diaz 610b64f4efSAntonio Nino Diaz /* 620b64f4efSAntonio Nino Diaz * This function has to be called at the end of any code that uses the function 630b64f4efSAntonio Nino Diaz * xlat_arch_tlbi_va(). 640b64f4efSAntonio Nino Diaz */ 650b64f4efSAntonio Nino Diaz void xlat_arch_tlbi_va_sync(void); 660b64f4efSAntonio Nino Diaz 677bb01fb2SAntonio Nino Diaz /* Print VA, PA, size and attributes of all regions in the mmap array. */ 68fd2299e6SAntonio Nino Diaz void xlat_mmap_print(mmap_region_t *const mmap); 697bb01fb2SAntonio Nino Diaz 707bb01fb2SAntonio Nino Diaz /* 717bb01fb2SAntonio Nino Diaz * Print the current state of the translation tables by reading them from 727bb01fb2SAntonio Nino Diaz * memory. 737bb01fb2SAntonio Nino Diaz */ 747bb01fb2SAntonio Nino Diaz void xlat_tables_print(xlat_ctx_t *ctx); 757bb01fb2SAntonio Nino Diaz 767bb01fb2SAntonio Nino Diaz /* 77fd2299e6SAntonio Nino Diaz * Returns a block/page table descriptor for the given level and attributes. 78fd2299e6SAntonio Nino Diaz */ 79fd2299e6SAntonio Nino Diaz uint64_t xlat_desc(const xlat_ctx_t *ctx, uint32_t attr, 80fd2299e6SAntonio Nino Diaz unsigned long long addr_pa, int level); 81fd2299e6SAntonio Nino Diaz 82fd2299e6SAntonio Nino Diaz /* 837bb01fb2SAntonio Nino Diaz * Architecture-specific initialization code. 847bb01fb2SAntonio Nino Diaz */ 857bb01fb2SAntonio Nino Diaz 86a5640252SAntonio Nino Diaz /* Returns the current Exception Level. The returned EL must be 1 or higher. */ 87a5640252SAntonio Nino Diaz int xlat_arch_current_el(void); 88a5640252SAntonio Nino Diaz 89a5640252SAntonio Nino Diaz /* 9099f60798SSandrine Bailleux * Return the maximum physical address supported by the hardware. 9199f60798SSandrine Bailleux * This value depends on the execution state (AArch32/AArch64). 9299f60798SSandrine Bailleux */ 9399f60798SSandrine Bailleux unsigned long long xlat_arch_get_max_supported_pa(void); 947bb01fb2SAntonio Nino Diaz 957bb01fb2SAntonio Nino Diaz /* Enable MMU and configure it to use the specified translation tables. */ 960cc7aa89SJeenu Viswambharan void setup_mmu_cfg(unsigned int flags, const uint64_t *base_table, 979fb8af33SRoberto Vargas unsigned long long max_pa, uintptr_t max_va); 987bb01fb2SAntonio Nino Diaz 99609c9191SAntonio Nino Diaz /* 100609c9191SAntonio Nino Diaz * Return 1 if the MMU of the translation regime managed by the given xlat_ctx_t 101609c9191SAntonio Nino Diaz * is enabled, 0 otherwise. 102609c9191SAntonio Nino Diaz */ 103609c9191SAntonio Nino Diaz int is_mmu_enabled_ctx(const xlat_ctx_t *ctx); 1047bb01fb2SAntonio Nino Diaz 1057bb01fb2SAntonio Nino Diaz #endif /* __XLAT_TABLES_PRIVATE_H__ */ 106