13ca9928dSSoby Mathew /* 23ca9928dSSoby Mathew * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 33ca9928dSSoby Mathew * 43ca9928dSSoby Mathew * Redistribution and use in source and binary forms, with or without 53ca9928dSSoby Mathew * modification, are permitted provided that the following conditions are met: 63ca9928dSSoby Mathew * 73ca9928dSSoby Mathew * Redistributions of source code must retain the above copyright notice, this 83ca9928dSSoby Mathew * list of conditions and the following disclaimer. 93ca9928dSSoby Mathew * 103ca9928dSSoby Mathew * Redistributions in binary form must reproduce the above copyright notice, 113ca9928dSSoby Mathew * this list of conditions and the following disclaimer in the documentation 123ca9928dSSoby Mathew * and/or other materials provided with the distribution. 133ca9928dSSoby Mathew * 143ca9928dSSoby Mathew * Neither the name of ARM nor the names of its contributors may be used 153ca9928dSSoby Mathew * to endorse or promote products derived from this software without specific 163ca9928dSSoby Mathew * prior written permission. 173ca9928dSSoby Mathew * 183ca9928dSSoby Mathew * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 193ca9928dSSoby Mathew * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 203ca9928dSSoby Mathew * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 213ca9928dSSoby Mathew * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 223ca9928dSSoby Mathew * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 233ca9928dSSoby Mathew * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 243ca9928dSSoby Mathew * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 253ca9928dSSoby Mathew * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 263ca9928dSSoby Mathew * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 273ca9928dSSoby Mathew * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 283ca9928dSSoby Mathew * POSSIBILITY OF SUCH DAMAGE. 293ca9928dSSoby Mathew */ 303ca9928dSSoby Mathew 313ca9928dSSoby Mathew #ifndef __XLAT_TABLES_PRIVATE_H__ 323ca9928dSSoby Mathew #define __XLAT_TABLES_PRIVATE_H__ 333ca9928dSSoby Mathew 34e8719552SAntonio Nino Diaz #include <cassert.h> 350029624fSAntonio Nino Diaz #include <platform_def.h> 36e8719552SAntonio Nino Diaz #include <utils.h> 37e8719552SAntonio Nino Diaz 380029624fSAntonio Nino Diaz /* 390029624fSAntonio Nino Diaz * If the platform hasn't defined a physical and a virtual address space size 400029624fSAntonio Nino Diaz * default to ADDR_SPACE_SIZE. 410029624fSAntonio Nino Diaz */ 420029624fSAntonio Nino Diaz #if ERROR_DEPRECATED 430029624fSAntonio Nino Diaz # ifdef ADDR_SPACE_SIZE 440029624fSAntonio Nino Diaz # error "ADDR_SPACE_SIZE is deprecated. Use PLAT_xxx_ADDR_SPACE_SIZE instead." 450029624fSAntonio Nino Diaz # endif 460029624fSAntonio Nino Diaz #elif defined(ADDR_SPACE_SIZE) 470029624fSAntonio Nino Diaz # ifndef PLAT_PHY_ADDR_SPACE_SIZE 480029624fSAntonio Nino Diaz # define PLAT_PHY_ADDR_SPACE_SIZE ADDR_SPACE_SIZE 490029624fSAntonio Nino Diaz # endif 500029624fSAntonio Nino Diaz # ifndef PLAT_VIRT_ADDR_SPACE_SIZE 510029624fSAntonio Nino Diaz # define PLAT_VIRT_ADDR_SPACE_SIZE ADDR_SPACE_SIZE 520029624fSAntonio Nino Diaz # endif 530029624fSAntonio Nino Diaz #endif 540029624fSAntonio Nino Diaz 550029624fSAntonio Nino Diaz /* The virtual and physical address space sizes must be powers of two. */ 560029624fSAntonio Nino Diaz CASSERT(IS_POWER_OF_TWO(PLAT_VIRT_ADDR_SPACE_SIZE), 570029624fSAntonio Nino Diaz assert_valid_virt_addr_space_size); 580029624fSAntonio Nino Diaz CASSERT(IS_POWER_OF_TWO(PLAT_PHY_ADDR_SPACE_SIZE), 590029624fSAntonio Nino Diaz assert_valid_phy_addr_space_size); 60e8719552SAntonio Nino Diaz 61*2240f45bSAntonio Nino Diaz /* 62*2240f45bSAntonio Nino Diaz * In AArch32 state, the MMU only supports 4KB page granularity, which means 63*2240f45bSAntonio Nino Diaz * that the first translation table level is either 1 or 2. Both of them are 64*2240f45bSAntonio Nino Diaz * allowed to have block and table descriptors. See section G4.5.6 of the 65*2240f45bSAntonio Nino Diaz * ARMv8-A Architecture Reference Manual (DDI 0487A.k) for more information. 66*2240f45bSAntonio Nino Diaz * 67*2240f45bSAntonio Nino Diaz * In AArch64 state, the MMU may support 4 KB, 16 KB and 64 KB page 68*2240f45bSAntonio Nino Diaz * granularity. For 4KB granularity, a level 0 table descriptor doesn't support 69*2240f45bSAntonio Nino Diaz * block translation. For 16KB, the same thing happens to levels 0 and 1. For 70*2240f45bSAntonio Nino Diaz * 64KB, same for level 1. See section D4.3.1 of the ARMv8-A Architecture 71*2240f45bSAntonio Nino Diaz * Reference Manual (DDI 0487A.k) for more information. 72*2240f45bSAntonio Nino Diaz * 73*2240f45bSAntonio Nino Diaz * The define below specifies the first table level that allows block 74*2240f45bSAntonio Nino Diaz * descriptors. 75*2240f45bSAntonio Nino Diaz */ 76*2240f45bSAntonio Nino Diaz 77*2240f45bSAntonio Nino Diaz #ifdef AARCH32 78*2240f45bSAntonio Nino Diaz 79*2240f45bSAntonio Nino Diaz # define XLAT_BLOCK_LEVEL_MIN 1 80*2240f45bSAntonio Nino Diaz 81*2240f45bSAntonio Nino Diaz #else /* if AArch64 */ 82*2240f45bSAntonio Nino Diaz 83*2240f45bSAntonio Nino Diaz # if PAGE_SIZE == (4*1024) /* 4KB */ 84*2240f45bSAntonio Nino Diaz # define XLAT_BLOCK_LEVEL_MIN 1 85*2240f45bSAntonio Nino Diaz # else /* 16KB or 64KB */ 86*2240f45bSAntonio Nino Diaz # define XLAT_BLOCK_LEVEL_MIN 2 87*2240f45bSAntonio Nino Diaz # endif 88*2240f45bSAntonio Nino Diaz 89*2240f45bSAntonio Nino Diaz #endif /* AARCH32 */ 90*2240f45bSAntonio Nino Diaz 913ca9928dSSoby Mathew void print_mmap(void); 923ca9928dSSoby Mathew void init_xlation_table(uintptr_t base_va, uint64_t *table, 933ca9928dSSoby Mathew int level, uintptr_t *max_va, 943ca9928dSSoby Mathew unsigned long long *max_pa); 953ca9928dSSoby Mathew 963ca9928dSSoby Mathew #endif /* __XLAT_TABLES_PRIVATE_H__ */ 97