1 /* 2 * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch.h> 8 #include <arch_helpers.h> 9 #include <assert.h> 10 #include <cassert.h> 11 #include <common_def.h> 12 #include <debug.h> 13 #include <platform_def.h> 14 #include <string.h> 15 #include <types.h> 16 #include <utils.h> 17 #include <xlat_tables.h> 18 #include "xlat_tables_private.h" 19 20 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE 21 #define LVL0_SPACER "" 22 #define LVL1_SPACER " " 23 #define LVL2_SPACER " " 24 #define LVL3_SPACER " " 25 #define get_level_spacer(level) \ 26 (((level) == U(0)) ? LVL0_SPACER : \ 27 (((level) == U(1)) ? LVL1_SPACER : \ 28 (((level) == U(2)) ? LVL2_SPACER : LVL3_SPACER))) 29 #define debug_print(...) tf_printf(__VA_ARGS__) 30 #else 31 #define debug_print(...) ((void)0) 32 #endif 33 34 #define UNSET_DESC ~0ULL 35 36 static uint64_t xlat_tables[MAX_XLAT_TABLES][XLAT_TABLE_ENTRIES] 37 __aligned(XLAT_TABLE_SIZE) __section("xlat_table"); 38 39 static unsigned int next_xlat; 40 static unsigned long long xlat_max_pa; 41 static uintptr_t xlat_max_va; 42 43 static uint64_t execute_never_mask; 44 static uint64_t ap1_mask; 45 46 /* 47 * Array of all memory regions stored in order of ascending base address. 48 * The list is terminated by the first entry with size == 0. 49 */ 50 static mmap_region_t mmap[MAX_MMAP_REGIONS + 1]; 51 52 53 void print_mmap(void) 54 { 55 #if LOG_LEVEL >= LOG_LEVEL_VERBOSE 56 debug_print("mmap:\n"); 57 mmap_region_t *mm = mmap; 58 while (mm->size) { 59 debug_print(" VA:%p PA:0x%llx size:0x%zx attr:0x%x\n", 60 (void *)mm->base_va, mm->base_pa, 61 mm->size, mm->attr); 62 ++mm; 63 }; 64 debug_print("\n"); 65 #endif 66 } 67 68 void mmap_add_region(unsigned long long base_pa, uintptr_t base_va, 69 size_t size, unsigned int attr) 70 { 71 mmap_region_t *mm = mmap; 72 mmap_region_t *mm_last = mm + ARRAY_SIZE(mmap) - 1; 73 unsigned long long end_pa = base_pa + size - 1; 74 uintptr_t end_va = base_va + size - 1; 75 76 assert(IS_PAGE_ALIGNED(base_pa)); 77 assert(IS_PAGE_ALIGNED(base_va)); 78 assert(IS_PAGE_ALIGNED(size)); 79 80 if (!size) 81 return; 82 83 assert(base_pa < end_pa); /* Check for overflows */ 84 assert(base_va < end_va); 85 86 assert((base_va + (uintptr_t)size - (uintptr_t)1) <= 87 (PLAT_VIRT_ADDR_SPACE_SIZE - 1)); 88 assert((base_pa + (unsigned long long)size - 1ULL) <= 89 (PLAT_PHY_ADDR_SPACE_SIZE - 1)); 90 91 #if ENABLE_ASSERTIONS 92 93 /* Check for PAs and VAs overlaps with all other regions */ 94 for (mm = mmap; mm->size; ++mm) { 95 96 uintptr_t mm_end_va = mm->base_va + mm->size - 1; 97 98 /* 99 * Check if one of the regions is completely inside the other 100 * one. 101 */ 102 int fully_overlapped_va = 103 ((base_va >= mm->base_va) && (end_va <= mm_end_va)) || 104 ((mm->base_va >= base_va) && (mm_end_va <= end_va)); 105 106 /* 107 * Full VA overlaps are only allowed if both regions are 108 * identity mapped (zero offset) or have the same VA to PA 109 * offset. Also, make sure that it's not the exact same area. 110 */ 111 if (fully_overlapped_va) { 112 assert((mm->base_va - mm->base_pa) == 113 (base_va - base_pa)); 114 assert((base_va != mm->base_va) || (size != mm->size)); 115 } else { 116 /* 117 * If the regions do not have fully overlapping VAs, 118 * then they must have fully separated VAs and PAs. 119 * Partial overlaps are not allowed 120 */ 121 122 unsigned long long mm_end_pa = 123 mm->base_pa + mm->size - 1; 124 125 int separated_pa = 126 (end_pa < mm->base_pa) || (base_pa > mm_end_pa); 127 int separated_va = 128 (end_va < mm->base_va) || (base_va > mm_end_va); 129 130 assert(separated_va && separated_pa); 131 } 132 } 133 134 mm = mmap; /* Restore pointer to the start of the array */ 135 136 #endif /* ENABLE_ASSERTIONS */ 137 138 /* Find correct place in mmap to insert new region */ 139 while (mm->base_va < base_va && mm->size) 140 ++mm; 141 142 /* 143 * If a section is contained inside another one with the same base 144 * address, it must be placed after the one it is contained in: 145 * 146 * 1st |-----------------------| 147 * 2nd |------------| 148 * 3rd |------| 149 * 150 * This is required for mmap_region_attr() to get the attributes of the 151 * small region correctly. 152 */ 153 while ((mm->base_va == base_va) && (mm->size > size)) 154 ++mm; 155 156 /* Make room for new region by moving other regions up by one place */ 157 memmove(mm + 1, mm, (uintptr_t)mm_last - (uintptr_t)mm); 158 159 /* Check we haven't lost the empty sentinal from the end of the array */ 160 assert(mm_last->size == 0); 161 162 mm->base_pa = base_pa; 163 mm->base_va = base_va; 164 mm->size = size; 165 mm->attr = attr; 166 167 if (end_pa > xlat_max_pa) 168 xlat_max_pa = end_pa; 169 if (end_va > xlat_max_va) 170 xlat_max_va = end_va; 171 } 172 173 void mmap_add(const mmap_region_t *mm) 174 { 175 while (mm->size) { 176 mmap_add_region(mm->base_pa, mm->base_va, mm->size, mm->attr); 177 ++mm; 178 } 179 } 180 181 static uint64_t mmap_desc(unsigned int attr, unsigned long long addr_pa, 182 unsigned int level) 183 { 184 uint64_t desc; 185 int mem_type; 186 187 /* Make sure that the granularity is fine enough to map this address. */ 188 assert((addr_pa & XLAT_BLOCK_MASK(level)) == 0); 189 190 desc = addr_pa; 191 /* 192 * There are different translation table descriptors for level 3 and the 193 * rest. 194 */ 195 desc |= (level == XLAT_TABLE_LEVEL_MAX) ? PAGE_DESC : BLOCK_DESC; 196 desc |= (attr & MT_NS) ? LOWER_ATTRS(NS) : 0; 197 desc |= (attr & MT_RW) ? LOWER_ATTRS(AP_RW) : LOWER_ATTRS(AP_RO); 198 desc |= LOWER_ATTRS(ACCESS_FLAG); 199 desc |= ap1_mask; 200 201 /* 202 * Deduce shareability domain and executability of the memory region 203 * from the memory type. 204 * 205 * Data accesses to device memory and non-cacheable normal memory are 206 * coherent for all observers in the system, and correspondingly are 207 * always treated as being Outer Shareable. Therefore, for these 2 types 208 * of memory, it is not strictly needed to set the shareability field 209 * in the translation tables. 210 */ 211 mem_type = MT_TYPE(attr); 212 if (mem_type == MT_DEVICE) { 213 desc |= LOWER_ATTRS(ATTR_DEVICE_INDEX | OSH); 214 /* 215 * Always map device memory as execute-never. 216 * This is to avoid the possibility of a speculative instruction 217 * fetch, which could be an issue if this memory region 218 * corresponds to a read-sensitive peripheral. 219 */ 220 desc |= execute_never_mask; 221 222 } else { /* Normal memory */ 223 /* 224 * Always map read-write normal memory as execute-never. 225 * (Trusted Firmware doesn't self-modify its code, therefore 226 * R/W memory is reserved for data storage, which must not be 227 * executable.) 228 * Note that setting the XN bit here is for consistency only. 229 * The function that enables the MMU sets the SCTLR_ELx.WXN bit, 230 * which makes any writable memory region to be treated as 231 * execute-never, regardless of the value of the XN bit in the 232 * translation table. 233 * 234 * For read-only memory, rely on the MT_EXECUTE/MT_EXECUTE_NEVER 235 * attribute to figure out the value of the XN bit. 236 */ 237 if ((attr & MT_RW) || (attr & MT_EXECUTE_NEVER)) { 238 desc |= execute_never_mask; 239 } 240 241 if (mem_type == MT_MEMORY) { 242 desc |= LOWER_ATTRS(ATTR_IWBWA_OWBWA_NTR_INDEX | ISH); 243 } else { 244 assert(mem_type == MT_NON_CACHEABLE); 245 desc |= LOWER_ATTRS(ATTR_NON_CACHEABLE_INDEX | OSH); 246 } 247 } 248 249 debug_print((mem_type == MT_MEMORY) ? "MEM" : 250 ((mem_type == MT_NON_CACHEABLE) ? "NC" : "DEV")); 251 debug_print(attr & MT_RW ? "-RW" : "-RO"); 252 debug_print(attr & MT_NS ? "-NS" : "-S"); 253 debug_print(attr & MT_EXECUTE_NEVER ? "-XN" : "-EXEC"); 254 return desc; 255 } 256 257 /* 258 * Look for the innermost region that contains the area at `base_va` with size 259 * `size`. Populate *attr with the attributes of this region. 260 * 261 * On success, this function returns 0. 262 * If there are partial overlaps (meaning that a smaller size is needed) or if 263 * the region can't be found in the given area, it returns -1. In this case the 264 * value pointed by attr should be ignored by the caller. 265 */ 266 static int mmap_region_attr(mmap_region_t *mm, uintptr_t base_va, 267 size_t size, unsigned int *attr) 268 { 269 /* Don't assume that the area is contained in the first region */ 270 int ret = -1; 271 272 /* 273 * Get attributes from last (innermost) region that contains the 274 * requested area. Don't stop as soon as one region doesn't contain it 275 * because there may be other internal regions that contain this area: 276 * 277 * |-----------------------------1-----------------------------| 278 * |----2----| |-------3-------| |----5----| 279 * |--4--| 280 * 281 * |---| <- Area we want the attributes of. 282 * 283 * In this example, the area is contained in regions 1, 3 and 4 but not 284 * in region 2. The loop shouldn't stop at region 2 as inner regions 285 * have priority over outer regions, it should stop at region 5. 286 */ 287 for (;; ++mm) { 288 289 if (!mm->size) 290 return ret; /* Reached end of list */ 291 292 if (mm->base_va > base_va + size - 1) 293 return ret; /* Next region is after area so end */ 294 295 if (mm->base_va + mm->size - 1 < base_va) 296 continue; /* Next region has already been overtaken */ 297 298 if (!ret && mm->attr == *attr) 299 continue; /* Region doesn't override attribs so skip */ 300 301 if (mm->base_va > base_va || 302 mm->base_va + mm->size - 1 < base_va + size - 1) 303 return -1; /* Region doesn't fully cover our area */ 304 305 *attr = mm->attr; 306 ret = 0; 307 } 308 return ret; 309 } 310 311 static mmap_region_t *init_xlation_table_inner(mmap_region_t *mm, 312 uintptr_t base_va, 313 uint64_t *table, 314 unsigned int level) 315 { 316 assert(level >= XLAT_TABLE_LEVEL_MIN && level <= XLAT_TABLE_LEVEL_MAX); 317 318 unsigned int level_size_shift = 319 L0_XLAT_ADDRESS_SHIFT - level * XLAT_TABLE_ENTRIES_SHIFT; 320 u_register_t level_size = (u_register_t)1 << level_size_shift; 321 u_register_t level_index_mask = 322 ((u_register_t)XLAT_TABLE_ENTRIES_MASK) << level_size_shift; 323 324 debug_print("New xlat table:\n"); 325 326 do { 327 uint64_t desc = UNSET_DESC; 328 329 if (!mm->size) { 330 /* Done mapping regions; finish zeroing the table */ 331 desc = INVALID_DESC; 332 } else if (mm->base_va + mm->size - 1 < base_va) { 333 /* This area is after the region so get next region */ 334 ++mm; 335 continue; 336 } 337 338 debug_print("%s VA:%p size:0x%llx ", get_level_spacer(level), 339 (void *)base_va, (unsigned long long)level_size); 340 341 if (mm->base_va > base_va + level_size - 1) { 342 /* Next region is after this area. Nothing to map yet */ 343 desc = INVALID_DESC; 344 /* Make sure that the current level allows block descriptors */ 345 } else if (level >= XLAT_BLOCK_LEVEL_MIN) { 346 /* 347 * Try to get attributes of this area. It will fail if 348 * there are partially overlapping regions. On success, 349 * it will return the innermost region's attributes. 350 */ 351 unsigned int attr; 352 int r = mmap_region_attr(mm, base_va, level_size, &attr); 353 354 if (!r) { 355 desc = mmap_desc(attr, 356 base_va - mm->base_va + mm->base_pa, 357 level); 358 } 359 } 360 361 if (desc == UNSET_DESC) { 362 /* Area not covered by a region so need finer table */ 363 uint64_t *new_table = xlat_tables[next_xlat++]; 364 assert(next_xlat <= MAX_XLAT_TABLES); 365 desc = TABLE_DESC | (uintptr_t)new_table; 366 367 /* Recurse to fill in new table */ 368 mm = init_xlation_table_inner(mm, base_va, 369 new_table, level+1); 370 } 371 372 debug_print("\n"); 373 374 *table++ = desc; 375 base_va += level_size; 376 } while ((base_va & level_index_mask) && 377 (base_va - 1 < PLAT_VIRT_ADDR_SPACE_SIZE - 1)); 378 379 return mm; 380 } 381 382 void init_xlation_table(uintptr_t base_va, uint64_t *table, 383 unsigned int level, uintptr_t *max_va, 384 unsigned long long *max_pa) 385 { 386 int el = xlat_arch_current_el(); 387 388 execute_never_mask = xlat_arch_get_xn_desc(el); 389 390 if (el == 3) { 391 ap1_mask = LOWER_ATTRS(AP_ONE_VA_RANGE_RES1); 392 } else { 393 assert(el == 1); 394 ap1_mask = 0; 395 } 396 397 init_xlation_table_inner(mmap, base_va, table, level); 398 *max_va = xlat_max_va; 399 *max_pa = xlat_max_pa; 400 } 401