15accce5bSRoberto Vargas/* 25accce5bSRoberto Vargas * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. 35accce5bSRoberto Vargas * 45accce5bSRoberto Vargas * SPDX-License-Identifier: BSD-3-Clause 55accce5bSRoberto Vargas */ 65accce5bSRoberto Vargas 7*09d40e0eSAntonio Nino Diaz#include <lib/xlat_tables/xlat_tables_defs.h> 85accce5bSRoberto Vargas#include <platform_def.h> 95accce5bSRoberto Vargas 105accce5bSRoberto VargasMEMORY { 115accce5bSRoberto Vargas ROM (rx): ORIGIN = ROMLIB_RO_BASE, LENGTH = ROMLIB_RO_LIMIT - ROMLIB_RO_BASE 125accce5bSRoberto Vargas RAM (rwx): ORIGIN = ROMLIB_RW_BASE, LENGTH = ROMLIB_RW_END - ROMLIB_RW_BASE 135accce5bSRoberto Vargas} 145accce5bSRoberto Vargas 155accce5bSRoberto VargasOUTPUT_FORMAT(PLATFORM_LINKER_FORMAT) 165accce5bSRoberto VargasOUTPUT_ARCH(PLATFORM_LINKER_ARCH) 175accce5bSRoberto VargasENTRY(jmptbl) 185accce5bSRoberto Vargas 195accce5bSRoberto VargasSECTIONS 205accce5bSRoberto Vargas{ 215accce5bSRoberto Vargas . = ROMLIB_RO_BASE; 225accce5bSRoberto Vargas .text : { 235accce5bSRoberto Vargas *jmptbl.o(.text) 245accce5bSRoberto Vargas *(.text*) 255accce5bSRoberto Vargas *(.rodata*) 265accce5bSRoberto Vargas } >ROM 275accce5bSRoberto Vargas 285accce5bSRoberto Vargas __DATA_ROM_START__ = LOADADDR(.data); 295accce5bSRoberto Vargas 305accce5bSRoberto Vargas .data : { 315accce5bSRoberto Vargas __DATA_RAM_START__ = .; 325accce5bSRoberto Vargas *(.data*) 335accce5bSRoberto Vargas __DATA_RAM_END__ = .; 345accce5bSRoberto Vargas } >RAM AT>ROM 355accce5bSRoberto Vargas 365accce5bSRoberto Vargas __DATA_SIZE__ = SIZEOF(.data); 375accce5bSRoberto Vargas 385accce5bSRoberto Vargas .bss : { 395accce5bSRoberto Vargas __BSS_START__ = .; 405accce5bSRoberto Vargas *(.bss*) 415accce5bSRoberto Vargas __BSS_END__ = .; 425accce5bSRoberto Vargas } >RAM 435accce5bSRoberto Vargas __BSS_SIZE__ = SIZEOF(.bss); 445accce5bSRoberto Vargas} 45