1 /* 2 * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <debug.h> 9 #include <platform.h> 10 #include <platform_def.h> 11 #include "psci_private.h" 12 13 #ifndef PLAT_MAX_PWR_LVL_STATES 14 #define PLAT_MAX_PWR_LVL_STATES 2U 15 #endif 16 17 /* Following structure is used for PSCI STAT */ 18 typedef struct psci_stat { 19 u_register_t residency; 20 u_register_t count; 21 } psci_stat_t; 22 23 /* 24 * Following is used to keep track of the last cpu 25 * that goes to power down in non cpu power domains. 26 */ 27 static int last_cpu_in_non_cpu_pd[PSCI_NUM_NON_CPU_PWR_DOMAINS] = { 28 [0 ... PSCI_NUM_NON_CPU_PWR_DOMAINS - 1] = -1}; 29 30 /* 31 * Following are used to store PSCI STAT values for 32 * CPU and non CPU power domains. 33 */ 34 static psci_stat_t psci_cpu_stat[PLATFORM_CORE_COUNT] 35 [PLAT_MAX_PWR_LVL_STATES]; 36 static psci_stat_t psci_non_cpu_stat[PSCI_NUM_NON_CPU_PWR_DOMAINS] 37 [PLAT_MAX_PWR_LVL_STATES]; 38 39 /* 40 * This functions returns the index into the `psci_stat_t` array given the 41 * local power state and power domain level. If the platform implements the 42 * `get_pwr_lvl_state_idx` pm hook, then that will be used to return the index. 43 */ 44 static int get_stat_idx(plat_local_state_t local_state, unsigned int pwr_lvl) 45 { 46 int idx; 47 48 if (psci_plat_pm_ops->get_pwr_lvl_state_idx == NULL) { 49 assert(PLAT_MAX_PWR_LVL_STATES == 2U); 50 if (is_local_state_retn(local_state) != 0) 51 return 0; 52 53 assert(is_local_state_off(local_state) != 0); 54 return 1; 55 } 56 57 idx = psci_plat_pm_ops->get_pwr_lvl_state_idx(local_state, pwr_lvl); 58 assert((idx >= 0) && (idx < (int) PLAT_MAX_PWR_LVL_STATES)); 59 return idx; 60 } 61 62 /******************************************************************************* 63 * This function is passed the target local power states for each power 64 * domain (state_info) between the current CPU domain and its ancestors until 65 * the target power level (end_pwrlvl). 66 * 67 * Then, for each level (apart from the CPU level) until the 'end_pwrlvl', it 68 * updates the `last_cpu_in_non_cpu_pd[]` with last power down cpu id. 69 * 70 * This function will only be invoked with data cache enabled and while 71 * powering down a core. 72 ******************************************************************************/ 73 void psci_stats_update_pwr_down(unsigned int end_pwrlvl, 74 const psci_power_state_t *state_info) 75 { 76 unsigned int lvl, parent_idx; 77 int cpu_idx = (int) plat_my_core_pos(); 78 79 assert(end_pwrlvl <= PLAT_MAX_PWR_LVL); 80 assert(state_info != NULL); 81 82 parent_idx = psci_cpu_pd_nodes[cpu_idx].parent_node; 83 84 for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) { 85 86 /* Break early if the target power state is RUN */ 87 if (is_local_state_run(state_info->pwr_domain_state[lvl]) != 0) 88 break; 89 90 /* 91 * The power domain is entering a low power state, so this is 92 * the last CPU for this power domain 93 */ 94 last_cpu_in_non_cpu_pd[parent_idx] = cpu_idx; 95 96 parent_idx = psci_non_cpu_pd_nodes[parent_idx].parent_node; 97 } 98 99 } 100 101 /******************************************************************************* 102 * This function updates the PSCI STATS(residency time and count) for CPU 103 * and NON-CPU power domains. 104 * It is called with caches enabled and locks acquired(for NON-CPU domain) 105 ******************************************************************************/ 106 void psci_stats_update_pwr_up(unsigned int end_pwrlvl, 107 const psci_power_state_t *state_info) 108 { 109 unsigned int lvl, parent_idx; 110 int cpu_idx = (int) plat_my_core_pos(); 111 int stat_idx; 112 plat_local_state_t local_state; 113 u_register_t residency; 114 115 assert(end_pwrlvl <= PLAT_MAX_PWR_LVL); 116 assert(state_info != NULL); 117 118 /* Get the index into the stats array */ 119 local_state = state_info->pwr_domain_state[PSCI_CPU_PWR_LVL]; 120 stat_idx = get_stat_idx(local_state, PSCI_CPU_PWR_LVL); 121 122 /* Call into platform interface to calculate residency. */ 123 residency = plat_psci_stat_get_residency(PSCI_CPU_PWR_LVL, 124 state_info, cpu_idx); 125 126 /* Update CPU stats. */ 127 psci_cpu_stat[cpu_idx][stat_idx].residency += residency; 128 psci_cpu_stat[cpu_idx][stat_idx].count++; 129 130 /* 131 * Check what power domains above CPU were off 132 * prior to this CPU powering on. 133 */ 134 parent_idx = psci_cpu_pd_nodes[cpu_idx].parent_node; 135 /* Return early if this is the first power up. */ 136 if (last_cpu_in_non_cpu_pd[parent_idx] == -1) 137 return; 138 139 for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl <= end_pwrlvl; lvl++) { 140 local_state = state_info->pwr_domain_state[lvl]; 141 if (is_local_state_run(local_state) != 0) { 142 /* Break early */ 143 break; 144 } 145 146 assert(last_cpu_in_non_cpu_pd[parent_idx] != -1); 147 148 /* Call into platform interface to calculate residency. */ 149 residency = plat_psci_stat_get_residency(lvl, state_info, 150 last_cpu_in_non_cpu_pd[parent_idx]); 151 152 /* Initialize back to reset value */ 153 last_cpu_in_non_cpu_pd[parent_idx] = -1; 154 155 /* Get the index into the stats array */ 156 stat_idx = get_stat_idx(local_state, lvl); 157 158 /* Update non cpu stats */ 159 psci_non_cpu_stat[parent_idx][stat_idx].residency += residency; 160 psci_non_cpu_stat[parent_idx][stat_idx].count++; 161 162 parent_idx = psci_non_cpu_pd_nodes[parent_idx].parent_node; 163 } 164 165 } 166 167 /******************************************************************************* 168 * This function returns the appropriate count and residency time of the 169 * local state for the highest power level expressed in the `power_state` 170 * for the node represented by `target_cpu`. 171 ******************************************************************************/ 172 static int psci_get_stat(u_register_t target_cpu, unsigned int power_state, 173 psci_stat_t *psci_stat) 174 { 175 int rc; 176 unsigned int pwrlvl, lvl, parent_idx, target_idx; 177 int stat_idx; 178 psci_power_state_t state_info = { {PSCI_LOCAL_STATE_RUN} }; 179 plat_local_state_t local_state; 180 181 /* Validate the target_cpu parameter and determine the cpu index */ 182 target_idx = (unsigned int) plat_core_pos_by_mpidr(target_cpu); 183 if (target_idx == (unsigned int) -1) 184 return PSCI_E_INVALID_PARAMS; 185 186 /* Validate the power_state parameter */ 187 if (psci_plat_pm_ops->translate_power_state_by_mpidr == NULL) 188 rc = psci_validate_power_state(power_state, &state_info); 189 else 190 rc = psci_plat_pm_ops->translate_power_state_by_mpidr( 191 target_cpu, power_state, &state_info); 192 193 if (rc != PSCI_E_SUCCESS) 194 return PSCI_E_INVALID_PARAMS; 195 196 /* Find the highest power level */ 197 pwrlvl = psci_find_target_suspend_lvl(&state_info); 198 if (pwrlvl == PSCI_INVALID_PWR_LVL) { 199 ERROR("Invalid target power level for PSCI statistics operation\n"); 200 panic(); 201 } 202 203 /* Get the index into the stats array */ 204 local_state = state_info.pwr_domain_state[pwrlvl]; 205 stat_idx = get_stat_idx(local_state, pwrlvl); 206 207 if (pwrlvl > PSCI_CPU_PWR_LVL) { 208 /* Get the power domain index */ 209 parent_idx = SPECULATION_SAFE_VALUE(psci_cpu_pd_nodes[target_idx].parent_node); 210 for (lvl = PSCI_CPU_PWR_LVL + 1U; lvl < pwrlvl; lvl++) 211 parent_idx = SPECULATION_SAFE_VALUE(psci_non_cpu_pd_nodes[parent_idx].parent_node); 212 213 /* Get the non cpu power domain stats */ 214 *psci_stat = psci_non_cpu_stat[parent_idx][stat_idx]; 215 } else { 216 /* Get the cpu power domain stats */ 217 *psci_stat = psci_cpu_stat[target_idx][stat_idx]; 218 } 219 220 return PSCI_E_SUCCESS; 221 } 222 223 /* This is the top level function for PSCI_STAT_RESIDENCY SMC. */ 224 u_register_t psci_stat_residency(u_register_t target_cpu, 225 unsigned int power_state) 226 { 227 psci_stat_t psci_stat; 228 int rc = psci_get_stat(target_cpu, power_state, &psci_stat); 229 230 if (rc == PSCI_E_SUCCESS) 231 return psci_stat.residency; 232 else 233 return 0; 234 } 235 236 /* This is the top level function for PSCI_STAT_COUNT SMC. */ 237 u_register_t psci_stat_count(u_register_t target_cpu, 238 unsigned int power_state) 239 { 240 psci_stat_t psci_stat; 241 int rc = psci_get_stat(target_cpu, power_state, &psci_stat); 242 243 if (rc == PSCI_E_SUCCESS) 244 return psci_stat.count; 245 else 246 return 0; 247 } 248