1 /* 2 * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arch.h> 32 #include <arch_helpers.h> 33 #include <assert.h> 34 #include <debug.h> 35 #include <platform.h> 36 #include <string.h> 37 #include "psci_private.h" 38 39 /****************************************************************************** 40 * Construct the psci_power_state to request power OFF at all power levels. 41 ******************************************************************************/ 42 static void psci_set_power_off_state(psci_power_state_t *state_info) 43 { 44 int lvl; 45 46 for (lvl = PSCI_CPU_PWR_LVL; lvl <= PLAT_MAX_PWR_LVL; lvl++) 47 state_info->pwr_domain_state[lvl] = PLAT_MAX_OFF_STATE; 48 } 49 50 /****************************************************************************** 51 * Top level handler which is called when a cpu wants to power itself down. 52 * It's assumed that along with turning the cpu power domain off, power 53 * domains at higher levels will be turned off as far as possible. It finds 54 * the highest level where a domain has to be powered off by traversing the 55 * node information and then performs generic, architectural, platform setup 56 * and state management required to turn OFF that power domain and domains 57 * below it. e.g. For a cpu that's to be powered OFF, it could mean programming 58 * the power controller whereas for a cluster that's to be powered off, it will 59 * call the platform specific code which will disable coherency at the 60 * interconnect level if the cpu is the last in the cluster and also the 61 * program the power controller. 62 ******************************************************************************/ 63 int psci_do_cpu_off(unsigned int end_pwrlvl) 64 { 65 int rc = PSCI_E_SUCCESS, idx = plat_my_core_pos(); 66 psci_power_state_t state_info; 67 68 /* 69 * This function must only be called on platforms where the 70 * CPU_OFF platform hooks have been implemented. 71 */ 72 assert(psci_plat_pm_ops->pwr_domain_off); 73 74 /* 75 * This function acquires the lock corresponding to each power 76 * level so that by the time all locks are taken, the system topology 77 * is snapshot and state management can be done safely. 78 */ 79 psci_acquire_pwr_domain_locks(end_pwrlvl, 80 idx); 81 82 /* 83 * Call the cpu off handler registered by the Secure Payload Dispatcher 84 * to let it do any bookkeeping. Assume that the SPD always reports an 85 * E_DENIED error if SP refuse to power down 86 */ 87 if (psci_spd_pm && psci_spd_pm->svc_off) { 88 rc = psci_spd_pm->svc_off(0); 89 if (rc) 90 goto exit; 91 } 92 93 /* Construct the psci_power_state for CPU_OFF */ 94 psci_set_power_off_state(&state_info); 95 96 /* 97 * This function is passed the requested state info and 98 * it returns the negotiated state info for each power level upto 99 * the end level specified. 100 */ 101 psci_do_state_coordination(end_pwrlvl, &state_info); 102 103 #if ENABLE_PSCI_STAT 104 /* Update the last cpu for each level till end_pwrlvl */ 105 psci_stats_update_pwr_down(end_pwrlvl, &state_info); 106 #endif 107 108 /* 109 * Arch. management. Perform the necessary steps to flush all 110 * cpu caches. 111 */ 112 psci_do_pwrdown_cache_maintenance(psci_find_max_off_lvl(&state_info)); 113 114 /* 115 * Plat. management: Perform platform specific actions to turn this 116 * cpu off e.g. exit cpu coherency, program the power controller etc. 117 */ 118 psci_plat_pm_ops->pwr_domain_off(&state_info); 119 120 #if ENABLE_PSCI_STAT 121 /* 122 * Capture time-stamp while entering low power state. 123 * No cache maintenance needed because caches are off 124 * and writes are direct to main memory. 125 */ 126 PMF_CAPTURE_TIMESTAMP(psci_svc, PSCI_STAT_ID_ENTER_LOW_PWR, 127 PMF_NO_CACHE_MAINT); 128 #endif 129 130 exit: 131 /* 132 * Release the locks corresponding to each power level in the 133 * reverse order to which they were acquired. 134 */ 135 psci_release_pwr_domain_locks(end_pwrlvl, 136 idx); 137 138 /* 139 * Check if all actions needed to safely power down this cpu have 140 * successfully completed. 141 */ 142 if (rc == PSCI_E_SUCCESS) { 143 /* 144 * Set the affinity info state to OFF. This writes directly to 145 * main memory as caches are disabled, so cache maintenance is 146 * required to ensure that later cached reads of aff_info_state 147 * return AFF_STATE_OFF. A dsbish() ensures ordering of the 148 * update to the affinity info state prior to cache line 149 * invalidation. 150 */ 151 flush_cpu_data(psci_svc_cpu_data.aff_info_state); 152 psci_set_aff_info_state(AFF_STATE_OFF); 153 dsbish(); 154 inv_cpu_data(psci_svc_cpu_data.aff_info_state); 155 156 if (psci_plat_pm_ops->pwr_domain_pwr_down_wfi) { 157 /* This function must not return */ 158 psci_plat_pm_ops->pwr_domain_pwr_down_wfi(&state_info); 159 } else { 160 /* 161 * Enter a wfi loop which will allow the power 162 * controller to physically power down this cpu. 163 */ 164 psci_power_down_wfi(); 165 } 166 } 167 168 return rc; 169 } 170