xref: /rk3399_ARM-atf/lib/psci/aarch64/psci_helpers.S (revision 82cb2c1ad9897473743f08437d0a3995bed561b9)
1532ed618SSoby Mathew/*
2532ed618SSoby Mathew * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
3532ed618SSoby Mathew *
4*82cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause
5532ed618SSoby Mathew */
6532ed618SSoby Mathew
7532ed618SSoby Mathew#include <asm_macros.S>
8532ed618SSoby Mathew#include <assert_macros.S>
9532ed618SSoby Mathew#include <platform_def.h>
10532ed618SSoby Mathew#include <psci.h>
11532ed618SSoby Mathew
12532ed618SSoby Mathew	.globl	psci_do_pwrdown_cache_maintenance
13532ed618SSoby Mathew	.globl	psci_do_pwrup_cache_maintenance
14cf0b1492SSoby Mathew	.globl	psci_power_down_wfi
15cf0b1492SSoby Mathew#if !ERROR_DEPRECATED
16cf0b1492SSoby Mathew	.globl psci_entrypoint
17cf0b1492SSoby Mathew#endif
18532ed618SSoby Mathew
19532ed618SSoby Mathew/* -----------------------------------------------------------------------
20532ed618SSoby Mathew * void psci_do_pwrdown_cache_maintenance(unsigned int power level);
21532ed618SSoby Mathew *
22532ed618SSoby Mathew * This function performs cache maintenance for the specified power
23532ed618SSoby Mathew * level. The levels of cache affected are determined by the power
24532ed618SSoby Mathew * level which is passed as the argument i.e. level 0 results
25532ed618SSoby Mathew * in a flush of the L1 cache. Both the L1 and L2 caches are flushed
26532ed618SSoby Mathew * for a higher power level.
27532ed618SSoby Mathew *
28532ed618SSoby Mathew * Additionally, this function also ensures that stack memory is correctly
29532ed618SSoby Mathew * flushed out to avoid coherency issues due to a change in its memory
30532ed618SSoby Mathew * attributes after the data cache is disabled.
31532ed618SSoby Mathew * -----------------------------------------------------------------------
32532ed618SSoby Mathew */
33532ed618SSoby Mathewfunc psci_do_pwrdown_cache_maintenance
34532ed618SSoby Mathew	stp     x29, x30, [sp,#-16]!
35532ed618SSoby Mathew	stp     x19, x20, [sp,#-16]!
36532ed618SSoby Mathew
37532ed618SSoby Mathew	/* ---------------------------------------------
385dd9dbb5SJeenu Viswambharan	 * Invoke CPU-specific power down operations for
395dd9dbb5SJeenu Viswambharan	 * the appropriate level
40532ed618SSoby Mathew	 * ---------------------------------------------
41532ed618SSoby Mathew	 */
425dd9dbb5SJeenu Viswambharan	bl	prepare_cpu_pwr_dwn
43532ed618SSoby Mathew
44532ed618SSoby Mathew	/* ---------------------------------------------
45532ed618SSoby Mathew	 * Do stack maintenance by flushing the used
46532ed618SSoby Mathew	 * stack to the main memory and invalidating the
47532ed618SSoby Mathew	 * remainder.
48532ed618SSoby Mathew	 * ---------------------------------------------
49532ed618SSoby Mathew	 */
50532ed618SSoby Mathew	bl	plat_get_my_stack
51532ed618SSoby Mathew
52532ed618SSoby Mathew	/* ---------------------------------------------
53532ed618SSoby Mathew	 * Calculate and store the size of the used
54532ed618SSoby Mathew	 * stack memory in x1.
55532ed618SSoby Mathew	 * ---------------------------------------------
56532ed618SSoby Mathew	 */
57532ed618SSoby Mathew	mov	x19, x0
58532ed618SSoby Mathew	mov	x1, sp
59532ed618SSoby Mathew	sub	x1, x0, x1
60532ed618SSoby Mathew	mov	x0, sp
61532ed618SSoby Mathew	bl	flush_dcache_range
62532ed618SSoby Mathew
63532ed618SSoby Mathew	/* ---------------------------------------------
64532ed618SSoby Mathew	 * Calculate and store the size of the unused
65532ed618SSoby Mathew	 * stack memory in x1. Calculate and store the
66532ed618SSoby Mathew	 * stack base address in x0.
67532ed618SSoby Mathew	 * ---------------------------------------------
68532ed618SSoby Mathew	 */
69532ed618SSoby Mathew	sub	x0, x19, #PLATFORM_STACK_SIZE
70532ed618SSoby Mathew	sub	x1, sp, x0
71532ed618SSoby Mathew	bl	inv_dcache_range
72532ed618SSoby Mathew
73532ed618SSoby Mathew	ldp	x19, x20, [sp], #16
74532ed618SSoby Mathew	ldp	x29, x30, [sp], #16
75532ed618SSoby Mathew	ret
76532ed618SSoby Mathewendfunc psci_do_pwrdown_cache_maintenance
77532ed618SSoby Mathew
78532ed618SSoby Mathew
79532ed618SSoby Mathew/* -----------------------------------------------------------------------
80532ed618SSoby Mathew * void psci_do_pwrup_cache_maintenance(void);
81532ed618SSoby Mathew *
82532ed618SSoby Mathew * This function performs cache maintenance after this cpu is powered up.
83532ed618SSoby Mathew * Currently, this involves managing the used stack memory before turning
84532ed618SSoby Mathew * on the data cache.
85532ed618SSoby Mathew * -----------------------------------------------------------------------
86532ed618SSoby Mathew */
87532ed618SSoby Mathewfunc psci_do_pwrup_cache_maintenance
88532ed618SSoby Mathew	stp	x29, x30, [sp,#-16]!
89532ed618SSoby Mathew
90532ed618SSoby Mathew	/* ---------------------------------------------
91532ed618SSoby Mathew	 * Ensure any inflight stack writes have made it
92532ed618SSoby Mathew	 * to main memory.
93532ed618SSoby Mathew	 * ---------------------------------------------
94532ed618SSoby Mathew	 */
95532ed618SSoby Mathew	dmb	st
96532ed618SSoby Mathew
97532ed618SSoby Mathew	/* ---------------------------------------------
98532ed618SSoby Mathew	 * Calculate and store the size of the used
99532ed618SSoby Mathew	 * stack memory in x1. Calculate and store the
100532ed618SSoby Mathew	 * stack base address in x0.
101532ed618SSoby Mathew	 * ---------------------------------------------
102532ed618SSoby Mathew	 */
103532ed618SSoby Mathew	bl	plat_get_my_stack
104532ed618SSoby Mathew	mov	x1, sp
105532ed618SSoby Mathew	sub	x1, x0, x1
106532ed618SSoby Mathew	mov	x0, sp
107532ed618SSoby Mathew	bl	inv_dcache_range
108532ed618SSoby Mathew
109532ed618SSoby Mathew	/* ---------------------------------------------
110532ed618SSoby Mathew	 * Enable the data cache.
111532ed618SSoby Mathew	 * ---------------------------------------------
112532ed618SSoby Mathew	 */
113532ed618SSoby Mathew	mrs	x0, sctlr_el3
114532ed618SSoby Mathew	orr	x0, x0, #SCTLR_C_BIT
115532ed618SSoby Mathew	msr	sctlr_el3, x0
116532ed618SSoby Mathew	isb
117532ed618SSoby Mathew
118532ed618SSoby Mathew	ldp	x29, x30, [sp], #16
119532ed618SSoby Mathew	ret
120532ed618SSoby Mathewendfunc psci_do_pwrup_cache_maintenance
121cf0b1492SSoby Mathew
122cf0b1492SSoby Mathew/* -----------------------------------------------------------------------
123cf0b1492SSoby Mathew * void psci_power_down_wfi(void);
124cf0b1492SSoby Mathew * This function is called to indicate to the power controller that it
125cf0b1492SSoby Mathew * is safe to power down this cpu. It should not exit the wfi and will
126cf0b1492SSoby Mathew * be released from reset upon power up.
127cf0b1492SSoby Mathew * -----------------------------------------------------------------------
128cf0b1492SSoby Mathew */
129cf0b1492SSoby Mathewfunc psci_power_down_wfi
130cf0b1492SSoby Mathew	dsb	sy		// ensure write buffer empty
131cf0b1492SSoby Mathew	wfi
132a806dad5SJeenu Viswambharan	no_ret	plat_panic_handler
133cf0b1492SSoby Mathewendfunc psci_power_down_wfi
134cf0b1492SSoby Mathew
135cf0b1492SSoby Mathew/* -----------------------------------------------------------------------
136cf0b1492SSoby Mathew * void psci_entrypoint(void);
137cf0b1492SSoby Mathew * The deprecated entry point for PSCI on warm boot for AArch64.
138cf0b1492SSoby Mathew * -----------------------------------------------------------------------
139cf0b1492SSoby Mathew */
140cf0b1492SSoby Mathewfunc_deprecated psci_entrypoint
141cf0b1492SSoby Mathew	b	bl31_warm_entrypoint
142cf0b1492SSoby Mathewendfunc_deprecated psci_entrypoint
143