1532ed618SSoby Mathew/* 2*695a48b5SHarrison Mutai * Copyright (c) 2014-2023, ARM Limited and Contributors. All rights reserved. 3532ed618SSoby Mathew * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 5532ed618SSoby Mathew */ 6532ed618SSoby Mathew 7532ed618SSoby Mathew#include <asm_macros.S> 8532ed618SSoby Mathew#include <assert_macros.S> 909d40e0eSAntonio Nino Diaz#include <lib/psci/psci.h> 10532ed618SSoby Mathew#include <platform_def.h> 11532ed618SSoby Mathew 12532ed618SSoby Mathew .globl psci_do_pwrdown_cache_maintenance 13532ed618SSoby Mathew .globl psci_do_pwrup_cache_maintenance 14cf0b1492SSoby Mathew .globl psci_power_down_wfi 15532ed618SSoby Mathew 16532ed618SSoby Mathew/* ----------------------------------------------------------------------- 17532ed618SSoby Mathew * void psci_do_pwrdown_cache_maintenance(unsigned int power level); 18532ed618SSoby Mathew * 19532ed618SSoby Mathew * This function performs cache maintenance for the specified power 20532ed618SSoby Mathew * level. The levels of cache affected are determined by the power 21532ed618SSoby Mathew * level which is passed as the argument i.e. level 0 results 22532ed618SSoby Mathew * in a flush of the L1 cache. Both the L1 and L2 caches are flushed 23532ed618SSoby Mathew * for a higher power level. 24532ed618SSoby Mathew * 25532ed618SSoby Mathew * Additionally, this function also ensures that stack memory is correctly 26532ed618SSoby Mathew * flushed out to avoid coherency issues due to a change in its memory 27532ed618SSoby Mathew * attributes after the data cache is disabled. 28532ed618SSoby Mathew * ----------------------------------------------------------------------- 29532ed618SSoby Mathew */ 30532ed618SSoby Mathewfunc psci_do_pwrdown_cache_maintenance 31532ed618SSoby Mathew stp x29, x30, [sp,#-16]! 32532ed618SSoby Mathew stp x19, x20, [sp,#-16]! 33532ed618SSoby Mathew 34532ed618SSoby Mathew /* --------------------------------------------- 355dd9dbb5SJeenu Viswambharan * Invoke CPU-specific power down operations for 365dd9dbb5SJeenu Viswambharan * the appropriate level 37532ed618SSoby Mathew * --------------------------------------------- 38532ed618SSoby Mathew */ 395dd9dbb5SJeenu Viswambharan bl prepare_cpu_pwr_dwn 40532ed618SSoby Mathew 41532ed618SSoby Mathew /* --------------------------------------------- 42532ed618SSoby Mathew * Do stack maintenance by flushing the used 43532ed618SSoby Mathew * stack to the main memory and invalidating the 44532ed618SSoby Mathew * remainder. 45532ed618SSoby Mathew * --------------------------------------------- 46532ed618SSoby Mathew */ 47532ed618SSoby Mathew bl plat_get_my_stack 48532ed618SSoby Mathew 49532ed618SSoby Mathew /* --------------------------------------------- 50532ed618SSoby Mathew * Calculate and store the size of the used 51532ed618SSoby Mathew * stack memory in x1. 52532ed618SSoby Mathew * --------------------------------------------- 53532ed618SSoby Mathew */ 54532ed618SSoby Mathew mov x19, x0 55532ed618SSoby Mathew mov x1, sp 56532ed618SSoby Mathew sub x1, x0, x1 57532ed618SSoby Mathew mov x0, sp 58532ed618SSoby Mathew bl flush_dcache_range 59532ed618SSoby Mathew 60532ed618SSoby Mathew /* --------------------------------------------- 61532ed618SSoby Mathew * Calculate and store the size of the unused 62532ed618SSoby Mathew * stack memory in x1. Calculate and store the 63532ed618SSoby Mathew * stack base address in x0. 64532ed618SSoby Mathew * --------------------------------------------- 65532ed618SSoby Mathew */ 66532ed618SSoby Mathew sub x0, x19, #PLATFORM_STACK_SIZE 67532ed618SSoby Mathew sub x1, sp, x0 68532ed618SSoby Mathew bl inv_dcache_range 69532ed618SSoby Mathew 70532ed618SSoby Mathew ldp x19, x20, [sp], #16 71532ed618SSoby Mathew ldp x29, x30, [sp], #16 72532ed618SSoby Mathew ret 73532ed618SSoby Mathewendfunc psci_do_pwrdown_cache_maintenance 74532ed618SSoby Mathew 75532ed618SSoby Mathew 76532ed618SSoby Mathew/* ----------------------------------------------------------------------- 77532ed618SSoby Mathew * void psci_do_pwrup_cache_maintenance(void); 78532ed618SSoby Mathew * 79532ed618SSoby Mathew * This function performs cache maintenance after this cpu is powered up. 80532ed618SSoby Mathew * Currently, this involves managing the used stack memory before turning 81532ed618SSoby Mathew * on the data cache. 82532ed618SSoby Mathew * ----------------------------------------------------------------------- 83532ed618SSoby Mathew */ 84532ed618SSoby Mathewfunc psci_do_pwrup_cache_maintenance 85532ed618SSoby Mathew stp x29, x30, [sp,#-16]! 86532ed618SSoby Mathew 87532ed618SSoby Mathew /* --------------------------------------------- 88532ed618SSoby Mathew * Ensure any inflight stack writes have made it 89532ed618SSoby Mathew * to main memory. 90532ed618SSoby Mathew * --------------------------------------------- 91532ed618SSoby Mathew */ 92532ed618SSoby Mathew dmb st 93532ed618SSoby Mathew 94532ed618SSoby Mathew /* --------------------------------------------- 95532ed618SSoby Mathew * Calculate and store the size of the used 96532ed618SSoby Mathew * stack memory in x1. Calculate and store the 97532ed618SSoby Mathew * stack base address in x0. 98532ed618SSoby Mathew * --------------------------------------------- 99532ed618SSoby Mathew */ 100532ed618SSoby Mathew bl plat_get_my_stack 101532ed618SSoby Mathew mov x1, sp 102532ed618SSoby Mathew sub x1, x0, x1 103532ed618SSoby Mathew mov x0, sp 104532ed618SSoby Mathew bl inv_dcache_range 105532ed618SSoby Mathew 106532ed618SSoby Mathew /* --------------------------------------------- 107532ed618SSoby Mathew * Enable the data cache. 108532ed618SSoby Mathew * --------------------------------------------- 109532ed618SSoby Mathew */ 110532ed618SSoby Mathew mrs x0, sctlr_el3 111532ed618SSoby Mathew orr x0, x0, #SCTLR_C_BIT 112532ed618SSoby Mathew msr sctlr_el3, x0 113532ed618SSoby Mathew isb 114532ed618SSoby Mathew 115532ed618SSoby Mathew ldp x29, x30, [sp], #16 116532ed618SSoby Mathew ret 117532ed618SSoby Mathewendfunc psci_do_pwrup_cache_maintenance 118cf0b1492SSoby Mathew 119cf0b1492SSoby Mathew/* ----------------------------------------------------------------------- 120cf0b1492SSoby Mathew * void psci_power_down_wfi(void); 121cf0b1492SSoby Mathew * This function is called to indicate to the power controller that it 122cf0b1492SSoby Mathew * is safe to power down this cpu. It should not exit the wfi and will 123cf0b1492SSoby Mathew * be released from reset upon power up. 124cf0b1492SSoby Mathew * ----------------------------------------------------------------------- 125cf0b1492SSoby Mathew */ 126cf0b1492SSoby Mathewfunc psci_power_down_wfi 127cf0b1492SSoby Mathew dsb sy // ensure write buffer empty 128*695a48b5SHarrison Mutai1: 129cf0b1492SSoby Mathew wfi 130*695a48b5SHarrison Mutai b 1b 131cf0b1492SSoby Mathewendfunc psci_power_down_wfi 132