xref: /rk3399_ARM-atf/lib/extensions/amu/aarch64/amu.c (revision 59902b7c4ca2413c2ee783da1bc66789e35868e5)
1380559c1SDimitris Papastamos /*
2380559c1SDimitris Papastamos  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3380559c1SDimitris Papastamos  *
4380559c1SDimitris Papastamos  * SPDX-License-Identifier: BSD-3-Clause
5380559c1SDimitris Papastamos  */
6380559c1SDimitris Papastamos 
7380559c1SDimitris Papastamos #include <amu.h>
8380559c1SDimitris Papastamos #include <arch.h>
9380559c1SDimitris Papastamos #include <arch_helpers.h>
10380559c1SDimitris Papastamos 
11380559c1SDimitris Papastamos void amu_enable(int el2_unused)
12380559c1SDimitris Papastamos {
13380559c1SDimitris Papastamos 	uint64_t features;
14380559c1SDimitris Papastamos 
15380559c1SDimitris Papastamos 	features = read_id_aa64pfr0_el1() >> ID_AA64PFR0_AMU_SHIFT;
16380559c1SDimitris Papastamos 	if ((features & ID_AA64PFR0_AMU_MASK) == 1) {
17380559c1SDimitris Papastamos 		uint64_t v;
18380559c1SDimitris Papastamos 
19380559c1SDimitris Papastamos 		if (el2_unused) {
20380559c1SDimitris Papastamos 			/*
21380559c1SDimitris Papastamos 			 * CPTR_EL2.TAM: Set to zero so any accesses to
22380559c1SDimitris Papastamos 			 * the Activity Monitor registers do not trap to EL2.
23380559c1SDimitris Papastamos 			 */
24380559c1SDimitris Papastamos 			v = read_cptr_el2();
25380559c1SDimitris Papastamos 			v &= ~CPTR_EL2_TAM_BIT;
26380559c1SDimitris Papastamos 			write_cptr_el2(v);
27380559c1SDimitris Papastamos 		}
28380559c1SDimitris Papastamos 
29380559c1SDimitris Papastamos 		/*
30380559c1SDimitris Papastamos 		 * CPTR_EL3.TAM: Set to zero so that any accesses to
31380559c1SDimitris Papastamos 		 * the Activity Monitor registers do not trap to EL3.
32380559c1SDimitris Papastamos 		 */
33380559c1SDimitris Papastamos 		v = read_cptr_el3();
34380559c1SDimitris Papastamos 		v &= ~TAM_BIT;
35380559c1SDimitris Papastamos 		write_cptr_el3(v);
36380559c1SDimitris Papastamos 
37380559c1SDimitris Papastamos 		/* Enable group 0 counters */
38380559c1SDimitris Papastamos 		write_amcntenset0_el0(AMU_GROUP0_COUNTERS_MASK);
39*59902b7cSDimitris Papastamos 		/* Enable group 1 counters */
40*59902b7cSDimitris Papastamos 		write_amcntenset1_el0(AMU_GROUP1_COUNTERS_MASK);
41380559c1SDimitris Papastamos 	}
42380559c1SDimitris Papastamos }
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