xref: /rk3399_ARM-atf/lib/extensions/amu/aarch64/amu.c (revision 380559c1c3ac80c0d2581a931c80323d1fefbfd6)
1*380559c1SDimitris Papastamos /*
2*380559c1SDimitris Papastamos  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3*380559c1SDimitris Papastamos  *
4*380559c1SDimitris Papastamos  * SPDX-License-Identifier: BSD-3-Clause
5*380559c1SDimitris Papastamos  */
6*380559c1SDimitris Papastamos 
7*380559c1SDimitris Papastamos #include <amu.h>
8*380559c1SDimitris Papastamos #include <arch.h>
9*380559c1SDimitris Papastamos #include <arch_helpers.h>
10*380559c1SDimitris Papastamos 
11*380559c1SDimitris Papastamos void amu_enable(int el2_unused)
12*380559c1SDimitris Papastamos {
13*380559c1SDimitris Papastamos 	uint64_t features;
14*380559c1SDimitris Papastamos 
15*380559c1SDimitris Papastamos 	features = read_id_aa64pfr0_el1() >> ID_AA64PFR0_AMU_SHIFT;
16*380559c1SDimitris Papastamos 	if ((features & ID_AA64PFR0_AMU_MASK) == 1) {
17*380559c1SDimitris Papastamos 		uint64_t v;
18*380559c1SDimitris Papastamos 
19*380559c1SDimitris Papastamos 		if (el2_unused) {
20*380559c1SDimitris Papastamos 			/*
21*380559c1SDimitris Papastamos 			 * CPTR_EL2.TAM: Set to zero so any accesses to
22*380559c1SDimitris Papastamos 			 * the Activity Monitor registers do not trap to EL2.
23*380559c1SDimitris Papastamos 			 */
24*380559c1SDimitris Papastamos 			v = read_cptr_el2();
25*380559c1SDimitris Papastamos 			v &= ~CPTR_EL2_TAM_BIT;
26*380559c1SDimitris Papastamos 			write_cptr_el2(v);
27*380559c1SDimitris Papastamos 		}
28*380559c1SDimitris Papastamos 
29*380559c1SDimitris Papastamos 		/*
30*380559c1SDimitris Papastamos 		 * CPTR_EL3.TAM: Set to zero so that any accesses to
31*380559c1SDimitris Papastamos 		 * the Activity Monitor registers do not trap to EL3.
32*380559c1SDimitris Papastamos 		 */
33*380559c1SDimitris Papastamos 		v = read_cptr_el3();
34*380559c1SDimitris Papastamos 		v &= ~TAM_BIT;
35*380559c1SDimitris Papastamos 		write_cptr_el3(v);
36*380559c1SDimitris Papastamos 
37*380559c1SDimitris Papastamos 		/* Enable group 0 counters */
38*380559c1SDimitris Papastamos 		write_amcntenset0_el0(AMU_GROUP0_COUNTERS_MASK);
39*380559c1SDimitris Papastamos 	}
40*380559c1SDimitris Papastamos }
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