1*ef69e1eaSDimitris Papastamos /* 2*ef69e1eaSDimitris Papastamos * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. 3*ef69e1eaSDimitris Papastamos * 4*ef69e1eaSDimitris Papastamos * SPDX-License-Identifier: BSD-3-Clause 5*ef69e1eaSDimitris Papastamos */ 6*ef69e1eaSDimitris Papastamos 7*ef69e1eaSDimitris Papastamos #include <amu.h> 8*ef69e1eaSDimitris Papastamos #include <arch.h> 9*ef69e1eaSDimitris Papastamos #include <arch_helpers.h> 10*ef69e1eaSDimitris Papastamos 11*ef69e1eaSDimitris Papastamos void amu_enable(int el2_unused) 12*ef69e1eaSDimitris Papastamos { 13*ef69e1eaSDimitris Papastamos uint64_t features; 14*ef69e1eaSDimitris Papastamos 15*ef69e1eaSDimitris Papastamos features = read_id_pfr0() >> ID_PFR0_AMU_SHIFT; 16*ef69e1eaSDimitris Papastamos if ((features & ID_PFR0_AMU_MASK) == 1) { 17*ef69e1eaSDimitris Papastamos if (el2_unused) { 18*ef69e1eaSDimitris Papastamos uint64_t v; 19*ef69e1eaSDimitris Papastamos 20*ef69e1eaSDimitris Papastamos /* 21*ef69e1eaSDimitris Papastamos * Non-secure access from EL0 or EL1 to the Activity Monitor 22*ef69e1eaSDimitris Papastamos * registers do not trap to EL2. 23*ef69e1eaSDimitris Papastamos */ 24*ef69e1eaSDimitris Papastamos v = read_hcptr(); 25*ef69e1eaSDimitris Papastamos v &= ~TAM_BIT; 26*ef69e1eaSDimitris Papastamos write_hcptr(v); 27*ef69e1eaSDimitris Papastamos } 28*ef69e1eaSDimitris Papastamos 29*ef69e1eaSDimitris Papastamos /* Enable group 0 counters */ 30*ef69e1eaSDimitris Papastamos write_amcntenset0(AMU_GROUP0_COUNTERS_MASK); 31*ef69e1eaSDimitris Papastamos } 32*ef69e1eaSDimitris Papastamos } 33