xref: /rk3399_ARM-atf/lib/cpus/errata_report.c (revision 10bcd761574a5aaa208041382399e05275011603)
1*10bcd761SJeenu Viswambharan /*
2*10bcd761SJeenu Viswambharan  * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
3*10bcd761SJeenu Viswambharan  *
4*10bcd761SJeenu Viswambharan  * Redistribution and use in source and binary forms, with or without
5*10bcd761SJeenu Viswambharan  * modification, are permitted provided that the following conditions are met:
6*10bcd761SJeenu Viswambharan  *
7*10bcd761SJeenu Viswambharan  * Redistributions of source code must retain the above copyright notice, this
8*10bcd761SJeenu Viswambharan  * list of conditions and the following disclaimer.
9*10bcd761SJeenu Viswambharan  *
10*10bcd761SJeenu Viswambharan  * Redistributions in binary form must reproduce the above copyright notice,
11*10bcd761SJeenu Viswambharan  * this list of conditions and the following disclaimer in the documentation
12*10bcd761SJeenu Viswambharan  * and/or other materials provided with the distribution.
13*10bcd761SJeenu Viswambharan  *
14*10bcd761SJeenu Viswambharan  * Neither the name of ARM nor the names of its contributors may be used
15*10bcd761SJeenu Viswambharan  * to endorse or promote products derived from this software without specific
16*10bcd761SJeenu Viswambharan  * prior written permission.
17*10bcd761SJeenu Viswambharan  *
18*10bcd761SJeenu Viswambharan  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19*10bcd761SJeenu Viswambharan  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20*10bcd761SJeenu Viswambharan  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21*10bcd761SJeenu Viswambharan  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22*10bcd761SJeenu Viswambharan  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23*10bcd761SJeenu Viswambharan  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24*10bcd761SJeenu Viswambharan  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25*10bcd761SJeenu Viswambharan  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26*10bcd761SJeenu Viswambharan  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27*10bcd761SJeenu Viswambharan  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28*10bcd761SJeenu Viswambharan  * POSSIBILITY OF SUCH DAMAGE.
29*10bcd761SJeenu Viswambharan  */
30*10bcd761SJeenu Viswambharan 
31*10bcd761SJeenu Viswambharan /* Runtime firmware routines to report errata status for the current CPU. */
32*10bcd761SJeenu Viswambharan 
33*10bcd761SJeenu Viswambharan #include <arch_helpers.h>
34*10bcd761SJeenu Viswambharan #include <assert.h>
35*10bcd761SJeenu Viswambharan #include <cpu_data.h>
36*10bcd761SJeenu Viswambharan #include <debug.h>
37*10bcd761SJeenu Viswambharan #include <errata_report.h>
38*10bcd761SJeenu Viswambharan #include <spinlock.h>
39*10bcd761SJeenu Viswambharan #include <utils.h>
40*10bcd761SJeenu Viswambharan 
41*10bcd761SJeenu Viswambharan #ifdef IMAGE_BL1
42*10bcd761SJeenu Viswambharan # define BL_STRING	"BL1"
43*10bcd761SJeenu Viswambharan #elif defined(AARCH64) && defined(IMAGE_BL31)
44*10bcd761SJeenu Viswambharan # define BL_STRING	"BL31"
45*10bcd761SJeenu Viswambharan #elif defined(AARCH32) && defined(IMAGE_BL32)
46*10bcd761SJeenu Viswambharan # define BL_STRING	"BL32"
47*10bcd761SJeenu Viswambharan #else
48*10bcd761SJeenu Viswambharan # error This image should not be printing errata status
49*10bcd761SJeenu Viswambharan #endif
50*10bcd761SJeenu Viswambharan 
51*10bcd761SJeenu Viswambharan /* Errata format: BL stage, CPU, errata ID, message */
52*10bcd761SJeenu Viswambharan #define ERRATA_FORMAT	"%s: %s: errata workaround for %s was %s\n"
53*10bcd761SJeenu Viswambharan 
54*10bcd761SJeenu Viswambharan /*
55*10bcd761SJeenu Viswambharan  * Returns whether errata needs to be reported. Passed arguments are private to
56*10bcd761SJeenu Viswambharan  * a CPU type.
57*10bcd761SJeenu Viswambharan  */
58*10bcd761SJeenu Viswambharan int errata_needs_reporting(spinlock_t *lock, uint32_t *reported)
59*10bcd761SJeenu Viswambharan {
60*10bcd761SJeenu Viswambharan 	int report_now;
61*10bcd761SJeenu Viswambharan 
62*10bcd761SJeenu Viswambharan 	/* If already reported, return false. */
63*10bcd761SJeenu Viswambharan 	if (*reported)
64*10bcd761SJeenu Viswambharan 		return 0;
65*10bcd761SJeenu Viswambharan 
66*10bcd761SJeenu Viswambharan 	/*
67*10bcd761SJeenu Viswambharan 	 * Acquire lock. Determine whether status needs reporting, and then mark
68*10bcd761SJeenu Viswambharan 	 * report status to true.
69*10bcd761SJeenu Viswambharan 	 */
70*10bcd761SJeenu Viswambharan 	spin_lock(lock);
71*10bcd761SJeenu Viswambharan 	report_now = !(*reported);
72*10bcd761SJeenu Viswambharan 	if (report_now)
73*10bcd761SJeenu Viswambharan 		*reported = 1;
74*10bcd761SJeenu Viswambharan 	spin_unlock(lock);
75*10bcd761SJeenu Viswambharan 
76*10bcd761SJeenu Viswambharan 	return report_now;
77*10bcd761SJeenu Viswambharan }
78*10bcd761SJeenu Viswambharan 
79*10bcd761SJeenu Viswambharan /*
80*10bcd761SJeenu Viswambharan  * Print errata status message.
81*10bcd761SJeenu Viswambharan  *
82*10bcd761SJeenu Viswambharan  * Unknown: WARN
83*10bcd761SJeenu Viswambharan  * Missing: WARN
84*10bcd761SJeenu Viswambharan  * Applied: INFO
85*10bcd761SJeenu Viswambharan  * Not applied: VERBOSE
86*10bcd761SJeenu Viswambharan  */
87*10bcd761SJeenu Viswambharan void errata_print_msg(int status, const char *cpu, const char *id)
88*10bcd761SJeenu Viswambharan {
89*10bcd761SJeenu Viswambharan 	/* Errata status strings */
90*10bcd761SJeenu Viswambharan 	static const char *const errata_status_str[] = {
91*10bcd761SJeenu Viswambharan 		[ERRATA_NOT_APPLIES] = "not applied",
92*10bcd761SJeenu Viswambharan 		[ERRATA_APPLIES] = "applied",
93*10bcd761SJeenu Viswambharan 		[ERRATA_MISSING] = "missing!"
94*10bcd761SJeenu Viswambharan 	};
95*10bcd761SJeenu Viswambharan 	static const char *const __unused bl_str = BL_STRING;
96*10bcd761SJeenu Viswambharan 	const char *msg __unused;
97*10bcd761SJeenu Viswambharan 
98*10bcd761SJeenu Viswambharan 
99*10bcd761SJeenu Viswambharan 	assert(status >= 0 && status < ARRAY_SIZE(errata_status_str));
100*10bcd761SJeenu Viswambharan 	assert(cpu);
101*10bcd761SJeenu Viswambharan 	assert(id);
102*10bcd761SJeenu Viswambharan 
103*10bcd761SJeenu Viswambharan 	msg = errata_status_str[status];
104*10bcd761SJeenu Viswambharan 
105*10bcd761SJeenu Viswambharan 	switch (status) {
106*10bcd761SJeenu Viswambharan 	case ERRATA_NOT_APPLIES:
107*10bcd761SJeenu Viswambharan 		VERBOSE(ERRATA_FORMAT, bl_str, cpu, id, msg);
108*10bcd761SJeenu Viswambharan 		break;
109*10bcd761SJeenu Viswambharan 
110*10bcd761SJeenu Viswambharan 	case ERRATA_APPLIES:
111*10bcd761SJeenu Viswambharan 		INFO(ERRATA_FORMAT, bl_str, cpu, id, msg);
112*10bcd761SJeenu Viswambharan 		break;
113*10bcd761SJeenu Viswambharan 
114*10bcd761SJeenu Viswambharan 	case ERRATA_MISSING:
115*10bcd761SJeenu Viswambharan 		WARN(ERRATA_FORMAT, bl_str, cpu, id, msg);
116*10bcd761SJeenu Viswambharan 		break;
117*10bcd761SJeenu Viswambharan 
118*10bcd761SJeenu Viswambharan 	default:
119*10bcd761SJeenu Viswambharan 		WARN(ERRATA_FORMAT, bl_str, cpu, id, "unknown");
120*10bcd761SJeenu Viswambharan 		break;
121*10bcd761SJeenu Viswambharan 	}
122*10bcd761SJeenu Viswambharan }
123