1 /* 2 * Copyright (c) 2024-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /* Runtime C routines for errata workarounds and common routines */ 8 9 #include <arch.h> 10 #include <arch_helpers.h> 11 #include <cortex_a75.h> 12 #include <cortex_a520.h> 13 #include <cortex_a710.h> 14 #include <cortex_a715.h> 15 #include <cortex_a720.h> 16 #include <cortex_a720_ae.h> 17 #include <cortex_a725.h> 18 #include <cortex_x2.h> 19 #include <cortex_x3.h> 20 #include <cortex_x4.h> 21 #include <cortex_x925.h> 22 #include <lib/cpus/cpu_ops.h> 23 #include <lib/cpus/errata.h> 24 #include <neoverse_n2.h> 25 #include <neoverse_n3.h> 26 #include <neoverse_v3.h> 27 28 #if ERRATA_A520_2938996 || ERRATA_X4_2726228 29 unsigned int check_if_affected_core(void) 30 { 31 uint32_t midr_val = read_midr(); 32 long rev_var = cpu_get_rev_var(); 33 34 if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_A520_MIDR)) { 35 return check_erratum_cortex_a520_2938996(rev_var); 36 } else if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_X4_MIDR)) { 37 return check_erratum_cortex_x4_2726228(rev_var); 38 } 39 40 return ERRATA_NOT_APPLIES; 41 } 42 #endif 43 44 #if ERRATA_A75_764081 45 bool errata_a75_764081_applies(void) 46 { 47 long rev_var = cpu_get_rev_var(); 48 if (check_erratum_cortex_a75_764081(rev_var) == ERRATA_APPLIES) { 49 return true; 50 } 51 return false; 52 } 53 #endif /* ERRATA_A75_764081 */ 54 55 bool errata_ich_vmcr_el2_applies(void) 56 { 57 switch (EXTRACT_PARTNUM(read_midr())) { 58 #if ERRATA_A710_3701772 59 case EXTRACT_PARTNUM(CORTEX_A710_MIDR): 60 if (check_erratum_cortex_a710_3701772(cpu_get_rev_var()) == ERRATA_APPLIES) 61 return true; 62 break; 63 #endif /* ERRATA_A710_3701772 */ 64 65 #if ERRATA_A715_3699560 66 case EXTRACT_PARTNUM(CORTEX_A715_MIDR): 67 if (check_erratum_cortex_a715_3699560(cpu_get_rev_var()) == ERRATA_APPLIES) 68 return true; 69 break; 70 #endif /* ERRATA_A715_3699560 */ 71 72 #if ERRATA_A720_3699561 73 case EXTRACT_PARTNUM(CORTEX_A720_MIDR): 74 if (check_erratum_cortex_a720_3699561(cpu_get_rev_var()) == ERRATA_APPLIES) 75 return true;; 76 break; 77 #endif /* ERRATA_A720_3699561 */ 78 79 #if ERRATA_A720_AE_3699562 80 case EXTRACT_PARTNUM(CORTEX_A720_AE_MIDR): 81 if (check_erratum_cortex_a720_ae_3699562(cpu_get_rev_var()) == ERRATA_APPLIES) 82 return true; 83 break; 84 #endif /* ERRATA_A720_AE_3699562 */ 85 86 #if ERRATA_A725_3699564 87 case EXTRACT_PARTNUM(CORTEX_A725_MIDR): 88 if (check_erratum_cortex_a725_3699564(cpu_get_rev_var()) == ERRATA_APPLIES) 89 return true; 90 break; 91 #endif /* ERRATA_A725_3699564 */ 92 93 #if ERRATA_X2_3701772 94 case EXTRACT_PARTNUM(CORTEX_X2_MIDR): 95 if (check_erratum_cortex_x2_3701772(cpu_get_rev_var()) == ERRATA_APPLIES) 96 return true; 97 break; 98 #endif /* ERRATA_X2_3701772 */ 99 100 #if ERRATA_X3_3701769 101 case EXTRACT_PARTNUM(CORTEX_X3_MIDR): 102 if (check_erratum_cortex_x3_3701769(cpu_get_rev_var()) == ERRATA_APPLIES) 103 return true; 104 break; 105 #endif /* ERRATA_X3_3701769 */ 106 107 #if ERRATA_X4_3701758 108 case EXTRACT_PARTNUM(CORTEX_X4_MIDR): 109 if (check_erratum_cortex_x4_3701758(cpu_get_rev_var()) == ERRATA_APPLIES) 110 return true; 111 break; 112 #endif /* ERRATA_X4_3701758 */ 113 114 #if ERRATA_X925_3701747 115 case EXTRACT_PARTNUM(CORTEX_X925_MIDR): 116 if (check_erratum_cortex_x925_3701747(cpu_get_rev_var()) == ERRATA_APPLIES) 117 return true; 118 break; 119 #endif /* ERRATA_X925_3701747 */ 120 121 #if ERRATA_N2_3701773 122 case EXTRACT_PARTNUM(NEOVERSE_N2_MIDR): 123 if (check_erratum_neoverse_n2_3701773(cpu_get_rev_var()) == ERRATA_APPLIES) 124 return true; 125 break; 126 #endif /* ERRATA_N2_3701773 */ 127 128 #if ERRATA_N3_3699563 129 case EXTRACT_PARTNUM(NEOVERSE_N3_MIDR): 130 if (check_erratum_neoverse_n3_3699563(cpu_get_rev_var()) == ERRATA_APPLIES) 131 return true; 132 break; 133 #endif /* ERRATA_N3_3699563 */ 134 135 #if ERRATA_V3_3701767 136 case EXTRACT_PARTNUM(NEOVERSE_V3_MIDR): 137 if (check_erratum_neoverse_v3_3701767(cpu_get_rev_var()) == ERRATA_APPLIES) 138 return true; 139 break; 140 #endif /* ERRATA_V3_3701767 */ 141 142 default: 143 break; 144 } 145 146 return false; 147 } 148