1 /* 2 * Copyright (c) 2024-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /* Runtime C routines for errata workarounds and common routines */ 8 9 #include <arch.h> 10 #include <arch_helpers.h> 11 #include <cortex_a75.h> 12 #include <cortex_a520.h> 13 #include <cortex_a710.h> 14 #include <cortex_a715.h> 15 #include <cortex_a720.h> 16 #include <cortex_a720_ae.h> 17 #include <cortex_a725.h> 18 #include <cortex_x2.h> 19 #include <cortex_x4.h> 20 #include <lib/cpus/cpu_ops.h> 21 #include <lib/cpus/errata.h> 22 23 #if ERRATA_A520_2938996 || ERRATA_X4_2726228 24 unsigned int check_if_affected_core(void) 25 { 26 uint32_t midr_val = read_midr(); 27 long rev_var = cpu_get_rev_var(); 28 29 if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_A520_MIDR)) { 30 return check_erratum_cortex_a520_2938996(rev_var); 31 } else if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_X4_MIDR)) { 32 return check_erratum_cortex_x4_2726228(rev_var); 33 } 34 35 return ERRATA_NOT_APPLIES; 36 } 37 #endif 38 39 #if ERRATA_A75_764081 40 bool errata_a75_764081_applies(void) 41 { 42 long rev_var = cpu_get_rev_var(); 43 if (check_erratum_cortex_a75_764081(rev_var) == ERRATA_APPLIES) { 44 return true; 45 } 46 return false; 47 } 48 #endif /* ERRATA_A75_764081 */ 49 50 bool errata_ich_vmcr_el2_applies(void) 51 { 52 switch (EXTRACT_PARTNUM(read_midr())) { 53 #if ERRATA_A710_3701772 54 case EXTRACT_PARTNUM(CORTEX_A710_MIDR): 55 if (check_erratum_cortex_a710_3701772(cpu_get_rev_var()) == ERRATA_APPLIES) 56 return true; 57 break; 58 #endif /* ERRATA_A710_3701772 */ 59 60 #if ERRATA_A715_3699560 61 case EXTRACT_PARTNUM(CORTEX_A715_MIDR): 62 if (check_erratum_cortex_a715_3699560(cpu_get_rev_var()) == ERRATA_APPLIES) 63 return true; 64 break; 65 #endif /* ERRATA_A715_3699560 */ 66 67 #if ERRATA_A720_3699561 68 case EXTRACT_PARTNUM(CORTEX_A720_MIDR): 69 if (check_erratum_cortex_a720_3699561(cpu_get_rev_var()) == ERRATA_APPLIES) 70 return true;; 71 break; 72 #endif /* ERRATA_A720_3699561 */ 73 74 #if ERRATA_A720_AE_3699562 75 case EXTRACT_PARTNUM(CORTEX_A720_AE_MIDR): 76 if (check_erratum_cortex_a720_ae_3699562(cpu_get_rev_var()) == ERRATA_APPLIES) 77 return true; 78 break; 79 #endif /* ERRATA_A720_AE_3699562 */ 80 81 #if ERRATA_A725_3699564 82 case EXTRACT_PARTNUM(CORTEX_A725_MIDR): 83 if (check_erratum_cortex_a725_3699564(cpu_get_rev_var()) == ERRATA_APPLIES) 84 return true; 85 break; 86 #endif /* ERRATA_A725_3699564 */ 87 88 #if ERRATA_X2_3701772 89 case EXTRACT_PARTNUM(CORTEX_X2_MIDR): 90 if (check_erratum_cortex_x2_3701772(cpu_get_rev_var()) == ERRATA_APPLIES) 91 return true; 92 break; 93 #endif /* ERRATA_X2_3701772 */ 94 95 default: 96 break; 97 } 98 99 return false; 100 } 101