1 /* 2 * Copyright (c) 2024-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /* Runtime C routines for errata workarounds and common routines */ 8 9 #include <assert.h> 10 11 #include <arch.h> 12 #include <arch_helpers.h> 13 #include <cortex_a75.h> 14 #include <cortex_a510.h> 15 #include <cortex_a520.h> 16 #include <cortex_a710.h> 17 #include <cortex_a715.h> 18 #include <cortex_a720.h> 19 #include <cortex_a720_ae.h> 20 #include <cortex_a725.h> 21 #include <cortex_x2.h> 22 #include <cortex_x3.h> 23 #include <cortex_x4.h> 24 #include <cortex_x925.h> 25 #include <c1_ultra.h> 26 #include <lib/cpus/cpu_ops.h> 27 #include <lib/cpus/errata.h> 28 #include <neoverse_n2.h> 29 #include <neoverse_n3.h> 30 #include <neoverse_v2.h> 31 #include <neoverse_v3.h> 32 #include <c1_pro.h> 33 34 struct erratum_entry *find_erratum_entry(uint32_t errata_id) 35 { 36 struct cpu_ops *cpu_ops; 37 struct erratum_entry *entry, *end; 38 39 cpu_ops = get_cpu_ops_ptr(); 40 assert(cpu_ops != NULL); 41 42 entry = cpu_ops->errata_list_start; 43 assert(entry != NULL); 44 45 end = cpu_ops->errata_list_end; 46 assert(end != NULL); 47 48 end--; /* point to the last erratum entry of the queried cpu */ 49 50 while ((entry <= end)) { 51 if (entry->id == errata_id) { 52 return entry; 53 } 54 entry += 1; 55 } 56 return NULL; 57 } 58 59 bool check_if_trbe_disable_affected_core(void) 60 { 61 switch (EXTRACT_PARTNUM(read_midr())) { 62 #if ERRATA_A520_2938996 63 case EXTRACT_PARTNUM(CORTEX_A520_MIDR): 64 return check_erratum_cortex_a520_2938996(cpu_get_rev_var()) == ERRATA_APPLIES; 65 #endif 66 #if ERRATA_X4_2726228 67 case EXTRACT_PARTNUM(CORTEX_X4_MIDR): 68 return check_erratum_cortex_x4_2726228(cpu_get_rev_var()) == ERRATA_APPLIES; 69 #endif 70 #if ERRATA_A510_2971420 71 case EXTRACT_PARTNUM(CORTEX_A510_MIDR): 72 return check_erratum_cortex_a510_2971420(cpu_get_rev_var()) == ERRATA_APPLIES; 73 #endif 74 default: 75 break; 76 } 77 return false; 78 } 79 80 #if ERRATA_A75_764081 81 bool errata_a75_764081_applies(void) 82 { 83 long rev_var = cpu_get_rev_var(); 84 if (check_erratum_cortex_a75_764081(rev_var) == ERRATA_APPLIES) { 85 return true; 86 } 87 return false; 88 } 89 #endif /* ERRATA_A75_764081 */ 90 91 bool errata_ich_vmcr_el2_applies(void) 92 { 93 switch (EXTRACT_PARTNUM(read_midr())) { 94 #if ERRATA_A710_3701772 95 case EXTRACT_PARTNUM(CORTEX_A710_MIDR): 96 if (check_erratum_cortex_a710_3701772(cpu_get_rev_var()) == ERRATA_APPLIES) 97 return true; 98 break; 99 #endif /* ERRATA_A710_3701772 */ 100 101 #if ERRATA_A715_3699560 102 case EXTRACT_PARTNUM(CORTEX_A715_MIDR): 103 if (check_erratum_cortex_a715_3699560(cpu_get_rev_var()) == ERRATA_APPLIES) 104 return true; 105 break; 106 #endif /* ERRATA_A715_3699560 */ 107 108 #if ERRATA_A720_3699561 109 case EXTRACT_PARTNUM(CORTEX_A720_MIDR): 110 if (check_erratum_cortex_a720_3699561(cpu_get_rev_var()) == ERRATA_APPLIES) 111 return true;; 112 break; 113 #endif /* ERRATA_A720_3699561 */ 114 115 #if ERRATA_A720_AE_3699562 116 case EXTRACT_PARTNUM(CORTEX_A720_AE_MIDR): 117 if (check_erratum_cortex_a720_ae_3699562(cpu_get_rev_var()) == ERRATA_APPLIES) 118 return true; 119 break; 120 #endif /* ERRATA_A720_AE_3699562 */ 121 122 #if ERRATA_A725_3699564 123 case EXTRACT_PARTNUM(CORTEX_A725_MIDR): 124 if (check_erratum_cortex_a725_3699564(cpu_get_rev_var()) == ERRATA_APPLIES) 125 return true; 126 break; 127 #endif /* ERRATA_A725_3699564 */ 128 129 #if ERRATA_X2_3701772 130 case EXTRACT_PARTNUM(CORTEX_X2_MIDR): 131 if (check_erratum_cortex_x2_3701772(cpu_get_rev_var()) == ERRATA_APPLIES) 132 return true; 133 break; 134 #endif /* ERRATA_X2_3701772 */ 135 136 #if ERRATA_X3_3701769 137 case EXTRACT_PARTNUM(CORTEX_X3_MIDR): 138 if (check_erratum_cortex_x3_3701769(cpu_get_rev_var()) == ERRATA_APPLIES) 139 return true; 140 break; 141 #endif /* ERRATA_X3_3701769 */ 142 143 #if ERRATA_X4_3701758 144 case EXTRACT_PARTNUM(CORTEX_X4_MIDR): 145 if (check_erratum_cortex_x4_3701758(cpu_get_rev_var()) == ERRATA_APPLIES) 146 return true; 147 break; 148 #endif /* ERRATA_X4_3701758 */ 149 150 #if ERRATA_X925_3701747 151 case EXTRACT_PARTNUM(CORTEX_X925_MIDR): 152 if (check_erratum_cortex_x925_3701747(cpu_get_rev_var()) == ERRATA_APPLIES) 153 return true; 154 break; 155 #endif /* ERRATA_X925_3701747 */ 156 157 #if ERRATA_N2_3701773 158 case EXTRACT_PARTNUM(NEOVERSE_N2_MIDR): 159 if (check_erratum_neoverse_n2_3701773(cpu_get_rev_var()) == ERRATA_APPLIES) 160 return true; 161 break; 162 #endif /* ERRATA_N2_3701773 */ 163 164 #if ERRATA_N3_3699563 165 case EXTRACT_PARTNUM(NEOVERSE_N3_MIDR): 166 if (check_erratum_neoverse_n3_3699563(cpu_get_rev_var()) == ERRATA_APPLIES) 167 return true; 168 break; 169 #endif /* ERRATA_N3_3699563 */ 170 171 #if ERRATA_V2_3701771 172 case EXTRACT_PARTNUM(NEOVERSE_V2_MIDR): 173 if (check_erratum_neoverse_v2_3701771(cpu_get_rev_var()) == ERRATA_APPLIES) 174 return true; 175 break; 176 #endif /* ERRATA_V2_3701771 */ 177 178 #if ERRATA_V3_3701767 179 case EXTRACT_PARTNUM(NEOVERSE_V3_MIDR): 180 if (check_erratum_neoverse_v3_3701767(cpu_get_rev_var()) == ERRATA_APPLIES) 181 return true; 182 break; 183 #endif /* ERRATA_V3_3701767 */ 184 185 #if ERRATA_C1ULTRA_3658374 186 case EXTRACT_PARTNUM(C1_ULTRA_MIDR): 187 if (check_erratum_c1_ultra_3658374(cpu_get_rev_var()) == ERRATA_APPLIES) 188 return true; 189 break; 190 #endif /* ERRATA_C1ULTRA_3658374 */ 191 192 #if ERRATA_C1PRO_3300099 193 case EXTRACT_PARTNUM(C1_PRO_MIDR): 194 if (check_erratum_c1_pro_3300099(cpu_get_rev_var()) == ERRATA_APPLIES) 195 return true; 196 break; 197 #endif /* ERRATA_C1PRO_3300099 */ 198 199 default: 200 break; 201 } 202 203 return false; 204 } 205 206 int check_erratum_applies(uint32_t cve, int errata_id) 207 { 208 struct erratum_entry *entry; 209 long rev_var; 210 211 rev_var = cpu_get_rev_var(); 212 213 entry = find_erratum_entry(errata_id); 214 215 if (entry == NULL) { 216 return ERRATA_NOT_APPLIES; 217 } 218 219 assert(entry->cve == cve); 220 221 return entry->check_func(rev_var); 222 } 223