1 /* 2 * Copyright (c) 2024-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /* Runtime C routines for errata workarounds and common routines */ 8 9 #include <arch.h> 10 #include <arch_helpers.h> 11 #include <cortex_a75.h> 12 #include <cortex_a520.h> 13 #include <cortex_a710.h> 14 #include <cortex_a715.h> 15 #include <cortex_a720.h> 16 #include <cortex_a720_ae.h> 17 #include <cortex_a725.h> 18 #include <cortex_x2.h> 19 #include <cortex_x3.h> 20 #include <cortex_x4.h> 21 #include <cortex_x925.h> 22 #include <lib/cpus/cpu_ops.h> 23 #include <lib/cpus/errata.h> 24 25 #if ERRATA_A520_2938996 || ERRATA_X4_2726228 26 unsigned int check_if_affected_core(void) 27 { 28 uint32_t midr_val = read_midr(); 29 long rev_var = cpu_get_rev_var(); 30 31 if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_A520_MIDR)) { 32 return check_erratum_cortex_a520_2938996(rev_var); 33 } else if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_X4_MIDR)) { 34 return check_erratum_cortex_x4_2726228(rev_var); 35 } 36 37 return ERRATA_NOT_APPLIES; 38 } 39 #endif 40 41 #if ERRATA_A75_764081 42 bool errata_a75_764081_applies(void) 43 { 44 long rev_var = cpu_get_rev_var(); 45 if (check_erratum_cortex_a75_764081(rev_var) == ERRATA_APPLIES) { 46 return true; 47 } 48 return false; 49 } 50 #endif /* ERRATA_A75_764081 */ 51 52 bool errata_ich_vmcr_el2_applies(void) 53 { 54 switch (EXTRACT_PARTNUM(read_midr())) { 55 #if ERRATA_A710_3701772 56 case EXTRACT_PARTNUM(CORTEX_A710_MIDR): 57 if (check_erratum_cortex_a710_3701772(cpu_get_rev_var()) == ERRATA_APPLIES) 58 return true; 59 break; 60 #endif /* ERRATA_A710_3701772 */ 61 62 #if ERRATA_A715_3699560 63 case EXTRACT_PARTNUM(CORTEX_A715_MIDR): 64 if (check_erratum_cortex_a715_3699560(cpu_get_rev_var()) == ERRATA_APPLIES) 65 return true; 66 break; 67 #endif /* ERRATA_A715_3699560 */ 68 69 #if ERRATA_A720_3699561 70 case EXTRACT_PARTNUM(CORTEX_A720_MIDR): 71 if (check_erratum_cortex_a720_3699561(cpu_get_rev_var()) == ERRATA_APPLIES) 72 return true;; 73 break; 74 #endif /* ERRATA_A720_3699561 */ 75 76 #if ERRATA_A720_AE_3699562 77 case EXTRACT_PARTNUM(CORTEX_A720_AE_MIDR): 78 if (check_erratum_cortex_a720_ae_3699562(cpu_get_rev_var()) == ERRATA_APPLIES) 79 return true; 80 break; 81 #endif /* ERRATA_A720_AE_3699562 */ 82 83 #if ERRATA_A725_3699564 84 case EXTRACT_PARTNUM(CORTEX_A725_MIDR): 85 if (check_erratum_cortex_a725_3699564(cpu_get_rev_var()) == ERRATA_APPLIES) 86 return true; 87 break; 88 #endif /* ERRATA_A725_3699564 */ 89 90 #if ERRATA_X2_3701772 91 case EXTRACT_PARTNUM(CORTEX_X2_MIDR): 92 if (check_erratum_cortex_x2_3701772(cpu_get_rev_var()) == ERRATA_APPLIES) 93 return true; 94 break; 95 #endif /* ERRATA_X2_3701772 */ 96 97 #if ERRATA_X3_3701769 98 case EXTRACT_PARTNUM(CORTEX_X3_MIDR): 99 if (check_erratum_cortex_x3_3701769(cpu_get_rev_var()) == ERRATA_APPLIES) 100 return true; 101 break; 102 #endif /* ERRATA_X3_3701769 */ 103 104 #if ERRATA_X4_3701758 105 case EXTRACT_PARTNUM(CORTEX_X4_MIDR): 106 if (check_erratum_cortex_x4_3701758(cpu_get_rev_var()) == ERRATA_APPLIES) 107 return true; 108 break; 109 #endif /* ERRATA_X4_3701758 */ 110 111 #if ERRATA_X925_3701747 112 case EXTRACT_PARTNUM(CORTEX_X925_MIDR): 113 if (check_erratum_cortex_x925_3701747(cpu_get_rev_var()) == ERRATA_APPLIES) 114 return true; 115 break; 116 #endif /* ERRATA_X925_3701747 */ 117 default: 118 break; 119 } 120 121 return false; 122 } 123