1 /* 2 * Copyright (c) 2024-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /* Runtime C routines for errata workarounds and common routines */ 8 9 #include <arch.h> 10 #include <arch_helpers.h> 11 #include <cortex_a75.h> 12 #include <cortex_a520.h> 13 #include <cortex_a710.h> 14 #include <cortex_x4.h> 15 #include <lib/cpus/cpu_ops.h> 16 #include <lib/cpus/errata.h> 17 18 #if ERRATA_A520_2938996 || ERRATA_X4_2726228 19 unsigned int check_if_affected_core(void) 20 { 21 uint32_t midr_val = read_midr(); 22 long rev_var = cpu_get_rev_var(); 23 24 if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_A520_MIDR)) { 25 return check_erratum_cortex_a520_2938996(rev_var); 26 } else if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_X4_MIDR)) { 27 return check_erratum_cortex_x4_2726228(rev_var); 28 } 29 30 return ERRATA_NOT_APPLIES; 31 } 32 #endif 33 34 #if ERRATA_A75_764081 35 bool errata_a75_764081_applies(void) 36 { 37 long rev_var = cpu_get_rev_var(); 38 if (check_erratum_cortex_a75_764081(rev_var) == ERRATA_APPLIES) { 39 return true; 40 } 41 return false; 42 } 43 #endif /* ERRATA_A75_764081 */ 44 45 bool errata_ich_vmcr_el2_applies(void) 46 { 47 switch (EXTRACT_PARTNUM(read_midr())) { 48 #if ERRATA_A710_3701772 49 case EXTRACT_PARTNUM(CORTEX_A710_MIDR): 50 if (check_erratum_cortex_a710_3701772(cpu_get_rev_var()) == ERRATA_APPLIES) 51 return true; 52 break; 53 #endif /* ERRATA_A710_3701772 */ 54 55 default: 56 break; 57 } 58 59 return false; 60 } 61