1 /* 2 * Copyright (c) 2024-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /* Runtime C routines for errata workarounds and common routines */ 8 9 #include <arch.h> 10 #include <arch_helpers.h> 11 #include <cortex_a75.h> 12 #include <cortex_a520.h> 13 #include <cortex_a710.h> 14 #include <cortex_a715.h> 15 #include <cortex_x4.h> 16 #include <lib/cpus/cpu_ops.h> 17 #include <lib/cpus/errata.h> 18 19 #if ERRATA_A520_2938996 || ERRATA_X4_2726228 20 unsigned int check_if_affected_core(void) 21 { 22 uint32_t midr_val = read_midr(); 23 long rev_var = cpu_get_rev_var(); 24 25 if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_A520_MIDR)) { 26 return check_erratum_cortex_a520_2938996(rev_var); 27 } else if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_X4_MIDR)) { 28 return check_erratum_cortex_x4_2726228(rev_var); 29 } 30 31 return ERRATA_NOT_APPLIES; 32 } 33 #endif 34 35 #if ERRATA_A75_764081 36 bool errata_a75_764081_applies(void) 37 { 38 long rev_var = cpu_get_rev_var(); 39 if (check_erratum_cortex_a75_764081(rev_var) == ERRATA_APPLIES) { 40 return true; 41 } 42 return false; 43 } 44 #endif /* ERRATA_A75_764081 */ 45 46 bool errata_ich_vmcr_el2_applies(void) 47 { 48 switch (EXTRACT_PARTNUM(read_midr())) { 49 #if ERRATA_A710_3701772 50 case EXTRACT_PARTNUM(CORTEX_A710_MIDR): 51 if (check_erratum_cortex_a710_3701772(cpu_get_rev_var()) == ERRATA_APPLIES) 52 return true; 53 break; 54 #endif /* ERRATA_A710_3701772 */ 55 56 #if ERRATA_A715_3699560 57 case EXTRACT_PARTNUM(CORTEX_A715_MIDR): 58 if (check_erratum_cortex_a715_3699560(cpu_get_rev_var()) == ERRATA_APPLIES) 59 return true; 60 break; 61 #endif /* ERRATA_A715_3699560 */ 62 63 default: 64 break; 65 } 66 67 return false; 68 } 69