1 /* 2 * Copyright (c) 2024-2025, Arm Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 /* Runtime C routines for errata workarounds and common routines */ 8 9 #include <arch.h> 10 #include <arch_helpers.h> 11 #include <cortex_a75.h> 12 #include <cortex_a520.h> 13 #include <cortex_a710.h> 14 #include <cortex_a715.h> 15 #include <cortex_a720.h> 16 #include <cortex_x4.h> 17 #include <lib/cpus/cpu_ops.h> 18 #include <lib/cpus/errata.h> 19 20 #if ERRATA_A520_2938996 || ERRATA_X4_2726228 21 unsigned int check_if_affected_core(void) 22 { 23 uint32_t midr_val = read_midr(); 24 long rev_var = cpu_get_rev_var(); 25 26 if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_A520_MIDR)) { 27 return check_erratum_cortex_a520_2938996(rev_var); 28 } else if (EXTRACT_PARTNUM(midr_val) == EXTRACT_PARTNUM(CORTEX_X4_MIDR)) { 29 return check_erratum_cortex_x4_2726228(rev_var); 30 } 31 32 return ERRATA_NOT_APPLIES; 33 } 34 #endif 35 36 #if ERRATA_A75_764081 37 bool errata_a75_764081_applies(void) 38 { 39 long rev_var = cpu_get_rev_var(); 40 if (check_erratum_cortex_a75_764081(rev_var) == ERRATA_APPLIES) { 41 return true; 42 } 43 return false; 44 } 45 #endif /* ERRATA_A75_764081 */ 46 47 bool errata_ich_vmcr_el2_applies(void) 48 { 49 switch (EXTRACT_PARTNUM(read_midr())) { 50 #if ERRATA_A710_3701772 51 case EXTRACT_PARTNUM(CORTEX_A710_MIDR): 52 if (check_erratum_cortex_a710_3701772(cpu_get_rev_var()) == ERRATA_APPLIES) 53 return true; 54 break; 55 #endif /* ERRATA_A710_3701772 */ 56 57 #if ERRATA_A715_3699560 58 case EXTRACT_PARTNUM(CORTEX_A715_MIDR): 59 if (check_erratum_cortex_a715_3699560(cpu_get_rev_var()) == ERRATA_APPLIES) 60 return true; 61 break; 62 #endif /* ERRATA_A715_3699560 */ 63 64 #if ERRATA_A720_3699561 65 case EXTRACT_PARTNUM(CORTEX_A720_MIDR): 66 if (check_erratum_cortex_a720_3699561(cpu_get_rev_var()) == ERRATA_APPLIES) 67 return true;; 68 break; 69 #endif /* ERRATA_A720_3699561 */ 70 71 default: 72 break; 73 } 74 75 return false; 76 } 77